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Mark Papermaster

Mark Papermaster is an American electrical engineer and technology executive serving as Chief Technology Officer and Executive Vice President of Technology and Engineering at Advanced Micro Devices (AMD) since October 2011. In this role, he drives the company's end-to-end technology vision, strategy, and product roadmap, including leading the redesign of engineering processes and the development of the Zen CPU architecture, high-performance GPUs, and Infinity Fabric interconnect technology. Papermaster's career spans more than 40 years in the and industries, beginning with a 26-year tenure at starting in 1982, where he held multiple senior leadership positions overseeing the development of key technologies and platforms, including blade servers. He joined Apple in 2009 as Senior Vice President of Device Hardware Engineering, recruited in 2008 following a legal dispute with over a non-compete agreement to lead hardware development for the and product lines, though his time there was marked by challenges including the antenna issues. Papermaster departed Apple in August 2010 amid criticism of the 's reception problems. Following his exit from Apple, Papermaster served as Vice President of Silicon Engineering at Cisco Systems from late 2010 to 2011, heading the company's silicon development efforts. At AMD, he has been instrumental in the company's resurgence, contributing to innovations in high-performance computing and AI accelerators. Papermaster holds a Bachelor of Science in Electrical Engineering from the University of Texas at Austin and a Master of Science in Electrical Engineering from the University of Vermont. He was elected to the National Academy of Engineering in February 2025 for his leadership in the design and production of complex integrated circuit processors.

Early life and education

Early life

Mark Papermaster grew up in , where he graduated from high school. Limited public information is available regarding his family background or early childhood influences. After high school, he pursued higher education at the .

Education

Papermaster earned a in from the in 1982. During his undergraduate studies, he focused on core engineering and technology coursework, supplementing it with electives in history and global civilization to broaden his perspective on societal impacts of technology. He later obtained a in from the in 1988. This advanced degree built on his foundational training, preparing him for specialized work in hardware design and .

Professional career

Time at IBM

Mark Papermaster joined in 1982 immediately after earning his in from the , beginning his career in the company's Division where he focused on . Over the next several years, he contributed to early advancements in semiconductor manufacturing and chip design tools, including work on a new CMOS-based chip architecture that became a widely adopted standard for versatile integrated circuits. In the early , Papermaster played a key role in the development of PowerPC technology, dedicating five years to this project and becoming a leading expert on 's Power micros and the Power ISA. He was promoted in 1991 to Vice President of Microprocessor Technology Development, a position he held until 2006, during which he oversaw the design and production of multiple generations of Power used in enterprise-class systems and applications. Under his leadership, advanced scalable computing architectures, emphasizing innovations in and optimization for demanding workloads. In October 2006, Papermaster transitioned to of the Blade Development Unit, where he led efforts in server until his departure in 2008. In this role, he directed the development of technologies, focusing on dense, modular systems that enhanced efficiency in environments and supported IBM's enterprise server portfolio.

Roles at Apple and Cisco

In 2009, Mark Papermaster joined Apple as Senior of Devices Hardware Engineering, a role in which he reported directly to CEO and oversaw the hardware development for mobile devices including the and . His appointment followed a legal dispute with his previous employer, , which delayed his start date until April 24, 2009, due to non-compete concerns. During his tenure at Apple, Papermaster led the hardware engineering efforts for the , which was developed and launched in June 2010 amid high expectations for advancing mobile device capabilities. His prior experience at , where he had specialized in design, informed his approach to integrating complex hardware components in . Papermaster departed Apple on August 7, 2010, shortly after the 4's release, which faced significant criticism over antenna design flaws known as "Antennagate," leading to reported internal tensions regarding hardware strategy and execution. Apple confirmed the exit but provided no further details on the circumstances. Following his time at Apple, Papermaster joined in November 2010 as of the Silicon Switching Technology Group, where he managed the development of application-specific integrated circuits (ASICs) tailored for switches and routers. In this position, which he held until 2011, he directed the strategy, , and efforts to enhance efficiency and performance in Cisco's networking , focusing on custom solutions to support high-speed operations.

Leadership at AMD

Mark Papermaster joined AMD in October 2011 as senior vice president and chief technology officer, where he assumed responsibility for the company's technical direction, product development strategy, and engineering teams. In this role, he led a comprehensive overhaul of AMD's microprocessor designs, focusing on high-performance computing architectures to reestablish the company's competitive position in the semiconductor market. His leadership emphasized innovation in core technologies, including the development of the Zen microarchitecture, which formed the foundation for AMD's resurgence in CPU performance. Under Papermaster's guidance, AMD launched its Zen-based product lines in 2017, including the EPYC server processors for data center applications, Ryzen desktop CPUs for consumer markets, and Threadripper high-end desktop processors targeting professional workloads. These releases marked a pivotal shift, delivering significant improvements in multi-threaded performance and efficiency compared to prior generations. He also oversaw the transition to 7nm process nodes starting with Zen 2 in 2019, which enabled higher core densities and power efficiency while advancing chiplet-based designs for enhanced scalability across product families. This modular chiplet approach, pioneered in EPYC processors, allowed AMD to mix and match compute dies for customized configurations, reducing manufacturing costs and improving yield rates. In January 2019, Papermaster was promoted to executive vice president and of technology and engineering, expanding his oversight to include the full engineering organization, from and advanced to validation and packaging. As of 2025, he continues to drive 's corporate technical roadmap, with a strong emphasis on and initiatives, including the strategic of integrated circuits optimized for data center acceleration. His efforts have supported advancements like the 5th-generation processors, which integrate workload optimizations and deliver up to 37% improvements in instructions per clock for HPC and tasks over previous generations. Through collaborations on open standards like and , Papermaster has positioned to scale infrastructure sustainably in enterprise environments.

Public engagement

Speaking engagements

Mark Papermaster has delivered several notable keynotes and presentations at major industry conferences, focusing on advancements in computing technologies. In 2016, he presented a keynote at the Design Automation Conference (DAC) titled "The Challenge to Develop Truly Great Products," where he explored the shift from traditional PC and smartphone eras to an immersive computing landscape driven by virtual and augmented reality. He highlighted the impending slowdown of Moore's Law, emphasizing the need for system-level scaling and innovative architectures to sustain progress in computing performance. At the Embedded World conference in 2018, Papermaster delivered the "Evolving Embedded Systems in a Self-Directed World," discussing the integration of machine intelligence into computing for edge processing. He advocated for localized data handling to enable applications, , and cost efficiencies, while addressing challenges in distributed systems and the role of for secure record-keeping. This presentation underscored processor integration strategies to support autonomous environments. Papermaster has also participated in panels and sessions on developments. In 2025, during AMD's Advancing AI event (held June 27, 2025), he contributed to discussions on the company's open-source AI ecosystem, including updates to the software stack and next-generation MI350 accelerators, reflecting his role in positioning AMD's innovations for AI scalability. In June 2025, Papermaster delivered the opening keynote at the ISC High Performance 2025 conference in , titled "HPC and : A Path Towards Sustainable Innovation." He discussed how (HPC) and are converging to drive scientific breakthroughs, emphasizing , open ecosystems, and collaborative innovation to address global challenges like climate modeling and . Later in 2025, at the Global Summit on , he presented a titled "A Fully Open and Collaborative Ecosystem," highlighting the role of open hardware, software, and community standards in scaling infrastructure. He projected the market reaching US$500 billion by 2028 and stressed the importance of and in semiconductors. In April 2025, he participated in a panel at OC3 2025 on silicon and . Recurring themes across his speaking engagements include the challenges posed by the slowing pace of and the evolution toward multi-core and heterogeneous processing paradigms. In various talks, he has addressed how frequency scaling limitations necessitate modular designs, such as multi-chip modules in AMD's processors, to achieve performance gains through parallelism and system integration rather than single-die advancements.

Publications and writings

Mark Papermaster has contributed articles to industry publications, addressing strategic challenges and innovations in and technologies. In a 2017 piece, he explored the implications of slowing scaling under , arguing that while physical limits are constraining traditional gains in speed and efficiency, emerging applications like , , and autonomous vehicles demand exponentially more computational power, often processed in at the network edge for reliability and low latency. He proposed overcoming these hurdles through "Moore's Law Plus" strategies, including heterogeneous architectures combining CPUs, GPUs, and specialized accelerators with advanced systems, cost-effective packaging innovations like 3D die stacking, and ecosystems to simplify development. Papermaster emphasized that advancements in , optical interconnects, and integrated designs would sustain performance improvements on an 18- to 24-month cycle, enabling continued growth despite miniaturization challenges. This perspective highlighted the need for industry-wide collaboration to integrate hardware and software innovations, ensuring evolves to meet data explosion from and sensor proliferation. Earlier, in a 2013 article for FedTech Magazine, Papermaster advocated for public-private partnerships to achieve , a milestone requiring systems capable of 1 quintillion calculations per second to advance fields like , climate modeling, and design. He outlined five key challenges: developing scalable architectures for millions of cores using hybrid CPU-GPU approaches; limiting power use to 20 megawatts through efficient components; enhancing for multicore communication; ensuring hardware reliability amid high failure rates; and creating software optimized for massive parallelism across nodes. Papermaster noted AMD's role in U.S. Department of Energy initiatives, such as the FastForward program, where the company received funding to tackle these issues collaboratively. In October 2025, Papermaster authored a blog post recapping his Global Summit keynote, titled "Open Standards for Scale: and Shape Infrastructure." He detailed how open compute projects are enabling scalable through advancements in software, rack-scale systems, and collaborative standards to support energy-efficient, high-performance data centers.

Affiliations and recognition

Professional organizations

Mark Papermaster serves on the Advisory Council for , a program under (formerly the Juvenile Diabetes Research Foundation or ), where he contributes to initiatives leveraging technology and gaming to advance research and advocacy. His involvement draws on his extensive expertise in semiconductor technology and engineering leadership at to support innovative funding and awareness efforts for diabetes cures. Papermaster is a member of the Presidents Council at College of Engineering, an advisory body that provides strategic guidance on , , and curriculum development to foster interdisciplinary problem-solving among students. This role aligns with his background in advancing computational technologies and talent development in the tech industry. He holds a position on the of the Cockrell School of Engineering at the , where he advises on programs in electrical and , innovation, and industry partnerships to enhance research and educational outcomes in and computing fields. As an alumnus of the institution, Papermaster's long-term service emphasizes bridging academic training with practical engineering challenges. Papermaster serves on the of the Global Semiconductor Alliance (GSA), contributing to initiatives that promote collaboration, standards, and growth in the global . Papermaster participates in the IEEE Industry Advisory Board, offering insights on , standards, and emerging trends in electrical and electronics engineering to influence IEEE's global initiatives and industry collaborations. His contributions focus on shaping policies that support advancements in computing hardware and sustainable technology practices.

Awards and honors

In February 2025, Mark Papermaster was elected to the (NAE), one of the highest professional distinctions for engineers in the United States, recognizing his leadership in the design and production of complex processors. This election highlights his pivotal role in advancing semiconductor technology during his tenure as at , where he oversaw innovations in architectures. The NAE selects members based on outstanding contributions to engineering research, practice, or education, including pioneering new fields of technology, major advancements in traditional engineering disciplines, or innovative approaches to engineering education. Papermaster's induction underscores his impact on scalable processor designs that have influenced modern computing, from data centers to AI systems, cementing his legacy as a key figure in the evolution of integrated circuits. With only 129 new members elected that year from a global pool of nominees, this honor positions him among an elite group of about 2,000 living members who shape engineering policy and innovation. Prior to his NAE election, Papermaster received the Distinguished Engineering Graduate Award from the University of Texas at Austin's Cockrell School of Engineering in 2023, the school's highest alumni honor, for his exceptional contributions to engineering and leadership in the semiconductor industry. In 2024, he was inducted into the Texas Electrical and Computer Engineering Academy of Distinguished Alumni, recognizing his outstanding professional accomplishments, industry impact, and dedication to advancing electrical and computer engineering. These accolades affirm his enduring influence on technology education and practice, bridging academic foundations with real-world semiconductor advancements.

References

  1. [1]
    Mark Papermaster - AMD
    Mark Papermaster is Chief Technology Officer and Executive Vice President, responsible for driving the company's end-to-end technology vision, strategy, and ...Missing: career | Show results with:career
  2. [2]
    Mark Papermaster | IEEE
    He also held a number of senior leadership positions at IBM, overseeing development of the company's key microprocessor and server technologies. Papermaster ...
  3. [3]
    Mark D Papermaster Exec VP/CTO, Advanced Micro Devices Inc
    Mark D Papermaster is Exec VP/CTO at Advanced Micro Devices Inc. See Mark D Papermaster's compensation, career history, education, & memberships.
  4. [4]
    Executive Leaves Apple After iPhone Antenna Troubles
    Aug 7, 2010 · Mark Papermaster, the Apple executive in charge of hardware for the company's flagship iPhone, has left the company in the wake of widely reported problems ...
  5. [5]
    TAMEST Member Profile: Mark Papermaster (NAE), AMD
    Before joining AMD in October 2011 as CTO, I was head of Cisco's Silicon Engineering Group, Apple Senior Vice President of Devices Hardware Engineering ...
  6. [6]
    Mark Papermaster Joins Apple as Senior Vice President of Devices ...
    Nov 4, 2008 · Mark Papermaster Joins Apple as Senior Vice President of Devices Hardware Engineering ... 1988. He is active with the University of Texas where he ...
  7. [7]
    Know the Questions—and Help Find the Answers - Texas Engineer
    Growing up, the dinner table talk in Mark Papermaster's (B.S. ECE 1982) family gravitated toward science – what seems like an unconventional topic of ...
  8. [8]
    Mr. Mark Papermaster | IT History Society
    Mark Papermaster. Make payments with PayPal - it's ... He worked at IBM from 1982?2008. His last ... He worked at IBM for 26 years, beginning in 1982 in Vermont.
  9. [9]
    Talking System Architecture With AMD CTO Mark Papermaster
    Nov 22, 2019 · But a few months before that, in October 2011, Read hired mark Papermaster to come to work for AMD as its chief technology officer.
  10. [10]
    Exclusive Interview with AMD's Mark Papermaster - EE Times Europe
    Dec 26, 2023 · He also worked at IBM for 26 years, where he performed several roles in technology and server development. At AMD, Papermaster led the ...<|control11|><|separator|>
  11. [11]
    Mark Papermaster to Begin Work at Apple on April 24th - MacRumors
    Jan 27, 2009 · Apple has announced that Mark Papermaster will begin work at Apple as Senior Vice President of Devices Hardware Engineering on April 24th, 2009.
  12. [12]
    Apple Settles With IBM, Papermaster to Join in April (AAPL)
    Jan 27, 2009 · Papermaster have now agreed on a resolution of the lawsuit under which Mr. Papermaster may not begin employment with Apple until April 24, 2009, ...
  13. [13]
    Apple iPhone boss leaves company - BBC News
    The Apple executive who oversaw development of the troubled iPhone 4 is leaving the company. Mark Papermaster has been head of Apple's iPhone and iPod ...
  14. [14]
    Former IBM chip expert cleared to begin work at Apple - AppleInsider
    Jan 27, 2009 · Apple announced Tuesday that Mark Papermaster, the former IBM ... 1988. The IBM veteran is also active with the University of Texas ...
  15. [15]
    Apple iPhone executive in shock exit - The Guardian
    Aug 8, 2010 · Apple's iPhone engineering chief, Mark Papermaster, has left the firm, while speculation grows on reason for his departure.
  16. [16]
    Amid iPhone 4 Antenna Controversy, Papermaster Out As Head Of ...
    Aug 7, 2010 · Bob Mansfield, Apple's SVP of Apple's Mac hardware engineering will step in to replace Papermaster, Apple confirmed to NYT.
  17. [17]
    Cisco hires former Apple executive Papermaster
    ### Summary of Mark Papermaster Joining Cisco
  18. [18]
    AMD Appoints Mark Papermaster as Senior Vice President and ...
    Oct 19, 2011 · Apple, Cisco and IBM Veteran Brings Extensive Processor and Platform Design Experience Spanning From Low-Power Handhelds to High-Performance ...
  19. [19]
    Mark Papermaster - AMD - LinkedIn
    Mark Papermaster is an experienced Chief Technology Officer overseeing corporate… · Experience: AMD · Education: The University of Texas at Austin ...Missing: career | Show results with:career
  20. [20]
    Mark Papermaster - SXSW 2025 Schedule | Contributors
    Mark Papermaster is Chief Technology Officer and Executive Vice President responsible for Advanced Micro ... Before joining AMD in October 2011 as Chief ...<|control11|><|separator|>
  21. [21]
    AMD Reveals First 7nm 'Zen 2' Processor Details - Forbes
    Nov 6, 2018 · AMD's Mark Papermaster outlines the new 7nm Zen 2 micro architecture as well as revealing Zen 3 and Zen 4 are also on track. Antony Leather.
  22. [22]
    AMD Strengthens Senior Leadership Team
    Jan 25, 2019 · AMD is promoting Mark Papermaster to executive vice president and CTO in recognition of his leadership in driving the technology vision and ...
  23. [23]
    Semiconductor Industry Voices: Featuring Mr. Mark Papermaster
    Mar 19, 2025 · Papermaster received his bachelor's degree from the University of Texas at Austin and master's degree from the University of Vermont, both in ...
  24. [24]
    Leadership HPC Performance with 5th Generation AMD EPYC ...
    Jan 22, 2025 · 5 th Gen AMD EPYC is providing up to 37% average core IPC (instructions per clock) improvement for HPC & AI workloads vs the 4 th Generation.
  25. [25]
    Open Standards for AI Scale: AMD and OCP Shape Infrastructure
    Oct 15, 2025 · AMD CTO Mark Papermaster shares how AMD and OCP are scaling AI with open standards, ROCm, and Helios. Read his keynote recap blog.
  26. [26]
    DAC 2016: There is More to Life than IC Design - 3D InCites
    Wednesday's keynote was presented by Mark Papermaster, CTO and Senior VP at AMD. Unlike the mostly technology-focused messages we typically hear, Papermaster ...
  27. [27]
    Embedded World Explores New Frontiers - Digital Engineering 24/7
    The new generation of machine intelligence is key to sophisticated embedded computing, Papermaster says. “Bring the data to the edge, and make it useful ...
  28. [28]
    The AMD Vision Comes Alive at Advancing AI 2025
    Jun 27, 2025 · At Advancing AI 2025, AMD introduced the AMD Instinct™MI350 series. ... AMD CTO Mark Papermaster shares how AMD and OCP are scaling AI with ...
  29. [29]
    Mark Papermaster: Moore's Law Plus - Cadence Blogs
    Oct 19, 2017 · But there are major cost challenges: mask costs are increasing 2-3X (50 masks at 14-16nm going up to 80 masks at 7nm without EUV). Screen ...Missing: speech | Show results with:speech
  30. [30]
    How computing will change amid challenges to Moore's Law
    Apr 13, 2017 · We face a dichotomy as the historical improvements of Moore's Law slow, while new compute-intensive applications require exponentially more capability.Missing: speech | Show results with:speech
  31. [31]
    Why Exascale Computing Requires a Collaborative Partnership ...
    Why Exascale ... Five challenges facing the government's supercomputer strategy. by. Mark Papermaster. Mark Papermaster is the senior vice president and chief ...
  32. [32]
    Mark Papermaster (CTO & EVP, AMD) - Breakthrough T1D Play
    Breakthrough T1D Play (formerly JDRF Game2Give®) is a program within ... type 1 diabetes (T1D) research and advocacy organization. Email us: play ...
  33. [33]
    Mark Papermaster: Positions, Relations and Network - MarketScreener
    Mark D. Papermaster is CTO, Executive VP-Technology & Engineering at Advanced Micro Devices, Inc. He is also Member-Presidents Council at Franklin W. Olin ...
  34. [34]
    Engineering Advisory Board
    The Cockrell School Engineering Advisory Board (EAB) is comprised of leaders in academia and industry who support excellence in engineering education.
  35. [35]
    Mark Papermaster - Electrical & Computer Engineering at UT Austin
    Mark Papermaster, CTO and Executive Vice President at Advanced Micro Devices (AMD), has been instrumental in AMD's revival over the past 15 years.Missing: Galveston early
  36. [36]
    National Academy of Engineering Elects 129 Members and 21 ...
    Feb 11, 2025 · Papermaster, Mark, chief technology officer and executive vice president, Advanced Micro Devices, Horseshoe Bay, Texas. For leadership in ...
  37. [37]
    National Academy of Engineering Selects 5 From UT - UT Austin News
    Feb 11, 2025 · Cockrell School of Engineering alumni Jimmy Don Wiethorn (left), Mark Papermaster (middle) and Michael Krames (right) have been elected to the ...
  38. [38]
    Five Inducted into Texas ECE Academy of Distinguished Alumni
    Jun 27, 2024 · Mark Papermaster, CTO and Executive Vice President at Advanced Micro Devices (AMD), has been instrumental in AMD's revival over the past 15 ...