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Phenom II

The AMD Phenom II is a family of 64-bit x86 multi-core microprocessors developed by Advanced Micro Devices (AMD), serving as the second-generation successor to the original Phenom series and based on the K10 microarchitecture manufactured using a 45 nm process node. Launched in January 2009 with the initial quad-core desktop models such as the Phenom II X4 940 Black Edition, the lineup was designed for high-performance desktop and mobile computing, featuring enhanced shared L3 cache sizes of up to 6 MB (a tripling from the 2 MB in the prior generation) to improve data access speeds and overall efficiency. Key improvements in the Phenom II over its predecessor included better power management, support for DDR2 and DDR3 memory via integrated controllers, and compatibility with Socket AM2+, AM2, and later AM3 sockets for desktop variants, enabling easier upgrades and overclocking potential in Black Edition models with unlocked multipliers. The family expanded to include dual-core (X2), triple-core (X3), quad-core (X4), and hexa-core (X6) configurations, with clock speeds ranging from 2.0 GHz to 3.7 GHz and thermal design power (TDP) options from 25 W for mobile parts to 125 W for high-end desktops. Mobile versions, such as the Phenom II N-series, targeted notebooks with lower power envelopes while maintaining multi-core performance for multimedia and productivity tasks. Notable for introducing AMD Turbo CORE technology in later six-core models like the Phenom II X6 1090T (released in 2010), the series supported instruction sets including SSE4a and , positioning it as a competitive alternative to Intel's Core 2 and early Core i-series processors in and content creation markets. Production of Phenom II processors continued until 2012, after which AMD transitioned to the Bulldozer-based series for further architectural advancements.

History

Development

The development of the Phenom II series originated from AMD's K10 microarchitecture project, which began in the early as a successor to the K8 architecture, with initial roadmap details emerging around 2003 following the launch of the Athlon 64. The first Phenom processors, based on this architecture and fabricated on a , were released on November 19, 2007, but encountered significant challenges, including a critical (TLB) erratum that could cause system hangs under specific workloads and notably high power consumption leading to thermal issues. To rectify these shortcomings and regain competitiveness against Intel's Core 2 series, AMD pursued design goals centered on a process shrink to 45 nm, which aimed to enhance manufacturing yields, reduce power draw, and enable higher clock speeds while fixing known bugs such as the TLB issue through revisions. This evolution built on internal revisions to the original Phenom, notably the B3 stepping introduced in March 2008, which incorporated a fix for the TLB and improved overall without relying on software patches that incurred penalties of up to 20%. Engineering efforts for involved substantial challenges, including the transition from the 65 nm to 45 nm silicon-on-insulator (SOI) process to achieve better and smaller die sizes—reducing from 283 mm² to 258 mm² for quad-core models—while maintaining with existing AM2+ sockets. collaborated closely with its operations, leveraging the Fab 36 facility in (later spun off as ) to ramp up 45 nm production, though initial yields were constrained by the complexities of SOI scaling and integrated L3 cache design. These revisions culminated in the , announced in late 2008 as the desktop counterpart to the server-oriented "Shanghai" Opteron processors, highlighting improvements in instructions per clock () by approximately 10% and enhanced thermal performance for better headroom.

Release Timeline

The Phenom II processor family debuted with the quad-core Deneb-based models, launched on January 8, 2009. This introduction featured key models such as the Phenom II X4 920 (2.8 GHz) and the unlocked Phenom II X4 940 Black Edition (3.0 GHz), both compatible with the AM2+ socket and positioned as AMD's response to Intel's Nehalem architecture, which had launched the Core i7 series in November 2008. In February 2009, AMD expanded the lineup with the introduction of the platform, enabling DDR3 memory support and with AM2+ motherboards via a BIOS update. This coincided with the launch of triple-core Heka-based processors on February 9, 2009, including the Phenom II X3 710 (2.6 GHz) and Phenom II X3 720 Black Edition (2.8 GHz), which addressed demand for mid-range multitasking performance. Later in Q2 2009, AMD rolled out additional 45 nm quad-core variants under the Zosma codename, such as the Phenom II X4 905e (2.5 GHz), focusing on energy-efficient designs for mainstream systems. The family further diversified in Q1 2010 with the debut of dual-core Callisto-based models, exemplified by the X2 555 Black Edition (3.2 GHz) launched in January 2010, targeting budget-conscious users while maintaining compatibility with the AM3 socket. A significant milestone came on April 27, 2010, when introduced the hex-core Thuban-based X6 series, starting with the X6 1090T Black Edition (3.2 GHz) and Phenom II X6 1055T (2.8 GHz), marking the company's first desktop six-core processors and enhancing multi-threaded workloads. Support for the ecosystem evolved through 2009 and 2010, with ongoing AM3 platform enhancements for DDR3 adoption, but production began winding down by 2011 as AMD shifted focus to newer architectures like . End-of-life announcements for various models, including the Phenom II X4 965 and X2 565, were issued in July 2012, with final shipments concluding in December 2012.

Architecture and Features

Microarchitecture

The AMD K10 , introduced with the Phenom series and carried over to Phenom II processors, represents AMD's first native quad-core design, enabling four independent processing cores on a single die without relying on multi-chip modules. This architecture employs an engine capable of issuing up to three macro-operations per clock cycle, utilizing a 12-stage for efficient handling. The floating-point and SIMD units feature a 128-bit wide , allowing for full processing of instructions in a single operation, a significant upgrade from the 64-bit units in prior K8-based designs. Although the microarchitecture includes provisions for (SMT) up to four ways per core in its execution framework, this capability was not activated in Phenom II implementations to prioritize per-core performance. At the core level, K10 integrates three integer arithmetic-logic units (ALUs) and three address generation units (AGUs) per , supporting parallel execution of integer operations and addressing tasks. Each also includes a dedicated 512 L2 cache with 16-way associativity, configured as an exclusive cache to minimize redundancy with the L1 levels. A shared L3 victim cache, typically 6 MB in size for most Phenom II configurations, services all on the die, employing a 48-way set-associative structure to handle data evicted from lower levels and improve overall hit rates in multi-core workloads. These components work together to deliver balanced throughput for general-purpose , with the L2 and L3 caches using 64-byte lines to align with x86 access patterns. The K10 microarchitecture supports the AMD64 instruction set (x86-64), including extensions such as MMX, , , , and AMD-specific SSE4A for enhanced string operations and masking, but it omits Intel's SSE4.1 and SSE4.2 extensions. Branch prediction relies on a hybrid scheme featuring a 13-stage global history predictor with a 16K-entry pattern history table and an 8- or 12-bit global history register, complemented by a 2K-entry branch target buffer (BTB) and a 24-entry return address stack; this setup incurs a 12- to 13-cycle penalty on mispredictions, emphasizing accuracy for workloads with predictable . For system integration, each K10 processor incorporates an on-die dual-channel supporting or at speeds up to 1333 MT/s, paired with a 3.0 interconnect offering up to 5.2 GT/s bidirectional bandwidth across a 16-bit link for I/O and inter-processor communication. Notably, K10 lacks integrated , necessitating an external northbridge such as the 790GX for GPU functionality and system coherency.

Key Improvements and Capabilities

The Phenom II series addressed a critical flaw in the original Phenom processors by resolving the TLB erratum, which could cause system instability in certain 64-bit workloads and scenarios. This hardware fix, introduced in the B3 stepping and carried forward in Phenom II, eliminated the need for a performance-impacting workaround that reduced throughput by up to 20% in affected applications on earlier models. Additionally, enhancements to the mechanisms improved access efficiency, contributing to better overall 64-bit and for virtualized environments. A major upgrade came from the shift to a 45 nm silicon-on-insulator (SOI) process technology for models, such as the Zosma and variants, compared to the used in the original Phenom chips. This transition reduced power leakage, allowed for denser integration (approximately 758 million transistors per die for quad-core models such as Zosma, and 904 million for hexa-core ), and enabled higher clock speeds reaching up to 3.6 GHz while maintaining thermal viability. Cache architecture saw significant refinement with a consistent 6 MB shared victim L3 across quad-core models, up from the 2 MB L3 in the original Phenom, featuring improved coherency protocols that enhanced multi-core data sharing and reduced latency in threaded workloads. Power and thermal management were bolstered by AMD Cool'n'Quiet 2.0 technology, which provided more granular dynamic scaling of frequency and voltage based on workload demands, alongside TDP ratings ranging from 65 W for energy-efficient models to 125 W for high-performance variants. These optimizations, combined with the architectural fixes and process shrink, delivered approximately 4-5% higher instructions per clock (IPC) compared to the original Phenom at equivalent frequencies, particularly in multi-threaded and integer-heavy tasks. Compatibility was a cornerstone of the design, with Phenom II supporting backward compatibility for AM2 and AM2+ sockets using DDR2 memory, while introducing forward compatibility with the AM3 socket to enable DDR3 upgrades without a full platform change.

Desktop Processors

Thuban

The Thuban codenamed processors represent AMD's first mainstream hexa-core desktop CPUs in the Phenom II lineup, manufactured on a 45 nm process and released starting in April 2010 as the Phenom II X6 series. These processors were designed to deliver enhanced multi-threaded performance for demanding applications, building on the K10 microarchitecture with six cores integrated on a single die. Key specifications include a die size of approximately 346 mm² and around 904 million transistors, with each featuring six s sharing a 6 L3 cache and 512 KB of L2 cache per (3 total L2). The (TDP) is rated at 95 W for most models, though some variants reach 125 W, and all operate at a nominal voltage of 1.25 V. processors utilize the AM3 and support dual-channel DDR3 up to 1333 MT/s, with a maximum capacity of 16 GB. Models designated with a "T" suffix incorporate technology, enabling unlocked single-core frequency boosts for improved responsiveness in lightly threaded workloads. Thuban targeted high-end desktop users focused on multitasking, content creation, and productivity tasks that benefit from , such as video encoding and . The series comprises six variants, differentiated primarily by base clock speeds and select features like unlocked multipliers on Black Edition models for easier :
ModelBase ClockTurbo ClockTDPRelease DateNotes
1035T2.6 GHz3.1 GHz95 WMay 2010OEM-only
1045T2.7 GHz3.2 GHz95 WSep 2010Standard
1055T2.8 GHz3.3 GHz95 WApr 2010Representative mid-range
1075T3.0 GHz3.5 GHz125 WSep 2010Higher TDP variant
1090T BE3.2 GHz3.6 GHz125 WApr 2010Black Edition, unlocked
1100T BE3.3 GHz3.7 GHz125 WDec 2010Black Edition, unlocked
Production of Thuban processors concluded in 2011 as AMD transitioned to the architecture.

Deneb

The Deneb codename refers to the initial quad-core desktop processors in AMD's Phenom II X4 series, launched on January 8, 2009, as the company's flagship offering to compete with Intel's Core 2 Quad lineup. These processors marked a significant from the original Phenom architecture, featuring refinements in efficiency and compatibility while maintaining the K10 microarchitecture. Positioned primarily for gaming and productivity workloads, Deneb models balanced multi-threaded performance with power efficiency for mainstream desktop systems. Fabricated on a 45 nm silicon-on-insulator (SOI) , Deneb processors featured a die size of 258 mm² and approximately 758 million transistors. Each included four with 512 KB of L2 per (2 MB total) and a shared 6 MB L3 , supporting 3.0 at 2.6 GT/s for inter-processor communication. (TDP) ranged from 95 W for energy-efficient variants to 125 W for high-performance models, with voltages typically between 1.25 V and 1.4 V. They were compatible with AM2+ and AM3 sockets, enabling dual-channel memory support for DDR2-1066 or DDR3-1333, with a maximum capacity of 16 GB. Over 20 Deneb-based models were released, including locked and unlocked Black Edition variants for overclocking enthusiasts. Notable examples include the Phenom II X4 940 Black Edition at 3.0 GHz and the X4 920 at 2.8 GHz as initial flagships, alongside lower-end options like the X4 905e at 2.5 GHz with 65 W TDP. This versatility allowed Deneb to serve as a bridge between consumer desktops and professional multi-processor setups, emphasizing AMD's push toward broader platform compatibility.

Zosma

The Zosma codename designates a series of quad-core processors in AMD's X4 lineup, fabricated on a 45 nm SOI process using and released starting in mid-2010. These processors evolved from the hex-core design, with two cores disabled to improve yields while retaining the full 6 MB shared L3 across the four active K10 cores. Representative models include the X4 840T at 2.9 GHz base clock (with Turbo Core boosting to 3.2 GHz under light loads), the X4 960T Black Edition at 3.0 GHz, and the higher-clocked X4 970 Black Edition at 3.5 GHz, positioning Zosma as a cost-effective option for mainstream computing tasks. Zosma processors feature a die size of 346 mm² containing approximately 904 million transistors, significantly larger than the 258 mm² due to the expanded supporting potential six-core configurations, yet offering improved power efficiency over 65 predecessors through process optimizations. (TDP) ratings range from 95 W for standard models to 125 W for select Black Edition variants, enabling better thermal management and sustained performance in value-oriented systems. All models integrate a dual-channel DDR3 supporting speeds up to 1333 MT/s (PC3-10600), with optimized timings such as 9-9-24 at the default voltage for reliable operation in AM3 socket platforms. The shared L3 cache design enhances multi-threaded efficiency, while the 45 shrink provides greater headroom compared to earlier generations. AMD produced around 10 Zosma models, focusing on the value segment with most featuring locked multipliers to prevent easy , except for rare Black Edition releases that allow multiplier adjustments for enthusiasts. Nominal core voltage is typically 1.175 V, balancing performance and efficiency in locked configurations. This lineup emphasized refined evolution in the family, prioritizing accessible pricing and incremental capability gains over high-end specifications.

Heka

The Heka codenamed processors formed the basis for AMD's X3 series of triple-core CPUs, launched on , 2009, and manufactured using a 45 nm silicon-on-insulator process. These chips targeted budget-conscious users seeking affordable multi-core performance for everyday and light multitasking, with approximately 15 models released over their lifecycle, including variants like the X3 710 (2.6 GHz), 720 Black Edition (2.8 GHz), and 740 (3.0 GHz). Each featured a (TDP) of 95 W, three active cores based on the K10 , 512 KB of L2 per core (totaling 1.5 MB), and a shared 6 MB L3 cache. The processors supported Socket AM2+ and AM3 platforms, with compatibility for both DDR2 and DDR3 memory up to 1066 MHz, enabling flexible upgrades in existing systems. Derived from the quad-core Deneb die with one core fused off to optimize manufacturing yields, the Heka design retained approximately 758 million transistors and a core voltage of around 1.25 V under stock conditions. Black Edition models, such as the 720 BE and 740 BE, included unlocked multipliers to facilitate , appealing to enthusiasts looking to extract additional performance without immediate hardware changes. This yield-focused approach allowed to offer competitive pricing while leveraging the same underlying as higher-end siblings, positioning the Phenom II X3 as an entry point into multi-threaded processing for value-oriented builds. A notable aspect of the Heka processors was their potential for core unlocking on compatible motherboards via BIOS settings, often restoring the disabled fourth core to create a functional quad-core setup, though success varied by silicon quality and board support. This feature extended the series' appeal in the budget segment, bridging the gap to more expensive quad-core options without requiring a full processor replacement.

Callisto

The Callisto codenamed processors formed the dual-core segment of AMD's Phenom II desktop lineup, targeting entry-level users with affordable options for basic computing and light multitasking tasks such as web browsing, office applications, and casual media consumption. These CPUs, built on the 45 nm silicon-on-insulator (SOI) process, were first released in June 2009, with subsequent models launching through 2011. Representative examples include the Phenom II X2 545 operating at 3.0 GHz, the Phenom II X2 550 at 3.1 GHz (launched November 2009), and the higher-clocked Phenom II X2 560 at 3.3 GHz (September 2010). Approximately 10 retail models were produced, all compatible with the AM3 socket and supporting DDR3-1333 memory in later revisions, though early variants also worked with AM2+ and DDR2. Derived from the same dies as the quad-core Deneb and triple-core Heka processors, Callisto chips achieved cost efficiency through die yield strategies that disabled two cores on defective quad-core silicon, preserving the full 6 MB shared L3 cache and 1 MB total L2 cache (512 KB per core). This architecture, part of the K10 microarchitecture's cache hierarchy, delivered improved single-threaded performance compared to the contemporaneous Athlon II X2 series, which lacked L3 cache and thus suffered from higher latency in cache-sensitive workloads. Operating with thermal design power (TDP) ratings of 65 W to 80 W and a nominal core voltage of 1.25 V, these processors featured approximately 758 million transistors across a 258 mm² die. Most models had locked multipliers to prevent overclocking, and while Black Edition unlocked variants existed for enthusiasts (such as the 550 BE and 555 BE), they were not the standard configuration for this budget-oriented family.

Mobile Processors

Champlain Design

The Champlain design marked the 45 nm evolution of AMD's K10 tailored for Phenom II processors, debuting in the second quarter of to power laptops with enhanced efficiency over prior 65 nm implementations. These processors employed the S1g4 in a µPGA-638 package and featured an integrated dual-channel supporting DDR2-800 or DDR3-1333 configurations up to 8 , enabling improved bandwidth for mobile multitasking while prioritizing power savings. Key design priorities centered on achieving low (TDP) ratings of 25-45 W to extend life in portable systems, incorporating an integrated and 3.0 interconnect at speeds up to 3.6 GT/s for efficient data transfer between the CPU and peripherals. Mobile Phenom II variants under Champlain omitted the shared L3 found in desktop counterparts, opting instead for 512 KB of L2 per in multi-core setups (1 MB per for dual-core models, total 2 MB) to reduce power draw and die complexity without significantly compromising performance. The shrink facilitated these optimizations, focused on reduction through denser integration and lower leakage. Core configurations spanned up to quad-core arrangements in the P-series for mainstream performance laptops, triple-core options in the N-series for balanced workloads, and dual-core models such as the N620, all equipped with per-core caching and dynamic voltage scaling to adapt power consumption dynamically based on load, thereby enhancing battery efficiency in varied usage scenarios. The accompanying platform leveraged the M880G , which provided an integrated HD 4200 graphics solution and supported ATI for multi-GPU acceleration in mobile environments, allowing for upgraded visual performance without discrete cards.

Champlain Models

The Champlain-based mobile processors were released in May 2010 as part of 's Danube platform, featuring the S1g4 socket and DDR3 memory support. These models prioritized for mainstream laptops focused on office productivity and media playback, with no dedicated L3 cache and per-core L2 cache configurations. All variants incorporate AMD PowerNow! technology for dynamic clock and voltage scaling to optimize power consumption. Production of the lineup extended through the end of 2011, with last shipments in early 2012. The quad-core P-series models target low-power ultrathin laptops. The P920 operates at 1.6 GHz with a 25 W TDP and 2 MB total cache (512 KB per core), while the P940 runs at 1.7 GHz, also at 25 W TDP with the same cache setup. Some quad-core variants, such as the X920 Black Edition, include unlocked multipliers for enhanced flexibility. Triple-core N-series processors derive from quad-core dies with one core disabled, akin to the Heka , enabling higher clocks within limits. The N830 clocks at 2.1 GHz with 1.5 MB L2 and 35 W TDP, and the N850 reaches 2.2 GHz under the same and power envelope. Dual-core models achieve elevated clock speeds due to reduced count and shared resources, suiting entry-level tasks with TDPs of 25-45 W. Representative examples include the N620 at 2.8 GHz with 2 MB L2 and 35 W TDP, and the N640 Black Edition at 2.9 GHz with identical and TDP.
Model SeriesExample ModelsCore CountBase ClockL2 Cache (Total)TDP
P-series (Quad-core)P920, P94041.6-1.7 GHz2 MB25 W
N-series (Triple-core)N830, N85032.1-2.2 GHz1.5 MB35 W
N-series (Dual-core)N620, N640 BE22.8-2.9 GHz2 MB35 W

Modifications

Overclocking

Overclocking Phenom II processors, particularly the Black Edition models, primarily involves adjusting the to increase clock speeds beyond specifications, as these variants feature an unlocked multiplier ratio for easier . For instance, the Phenom II X4 940 Black Edition, with a multiplier of 15x at 200 MHz clock for 3.0 GHz, can be stably overclocked to 18x for 3.6 GHz by raising the core voltage from 1.25 V to 1.50 V under . Higher overclocks often require voltages up to 1.45 V for in 24/7 use, though recommends not exceeding 1.55 V with to avoid degradation. An alternative or complementary technique is bus overclocking through the HyperTransport (HT) link, which connects the CPU to the northbridge and can be raised from the stock 2.6 GT/s to up to 4.0 GT/s to improve memory and I/O bandwidth. However, this is often limited by northbridge heat generation, necessitating additional chipset cooling to maintain stability during extended loads. The stock AMD heatsink is generally insufficient for overclocks beyond 3.5 GHz due to increased thermal output, requiring aftermarket air coolers or liquid cooling solutions for targets above 4 GHz to keep temperatures below 62°C under load. Temperature monitoring tools such as Core Temp are essential to track per-core readings and prevent thermal throttling. Stability must be verified using stress tests like Prime95 for computational workloads or AIDA64 for system-wide checks, with successful air-cooled overclocks typically yielding 20-30% performance improvements in CPU-bound tasks compared to stock speeds. The AM3 platform offers advantages over AM2+ for , including superior modules (VRMs) that better handle elevated voltages and power delivery for sustained high-frequency operation without throttling.

Core Unlocking

Core unlocking on Phenom II processors involves enabling one or more disabled cores on certain triple-core (X3, Heka-based) and dual-core (X2, Callisto-based) models, which were manufactured on 45 nm dies with cores fused off primarily to improve production yields by salvaging partially defective chips. These disabled cores originate from the same quad-core Deneb-derived architecture but are intentionally deactivated during fabrication if they fail quality tests, allowing to market lower-core variants at reduced prices. Success rates for unlocking vary by model and , with reports indicating approximately 50% to 70% feasibility on compatible , though outcomes depend on the specific quality and whether the disabled cores are stable enough for activation. The process is performed through BIOS settings on AM2+ or AM3 motherboards supporting AMD's Advanced Clock Calibration (ACC) feature, available from manufacturers such as Gigabyte, Asus, and MSI. Users enable the "Advanced CPU Core" or ACC option, often setting it to "Auto" or adjusting calibration percentages for individual cores (e.g., -10% to +10%) to stabilize the unlocked units; for instance, a Phenom II X3 720 can be transformed into a functional equivalent of the Phenom II X4 955 by activating the fourth core. Successful unlocks require processors with specific steppings, such as C2 for Deneb-derived chips, robust power delivery from the motherboard's voltage regulator modules, and potentially minor voltage adjustments within safe limits to ensure stability. However, this modification typically voids the processor's warranty, as it alters the intended configuration and may stress components beyond AMD's specifications. Upon successful unlocking, multi-threaded workloads can see performance improvements of up to 25%, as the additional core(s) enable better in applications like video encoding or rendering, though single-threaded tasks remain unchanged. Unlocked processors generate more heat due to the extra active cores, effectively increasing (TDP) to around 125 W even if the original rating was lower, necessitating improved cooling solutions and temperature monitoring to avoid throttling or damage. Verification of the unlock can be done using software tools like OverDrive, which displays core count and stability under load. Limitations are significant for other Phenom II variants; 45 nm models based on Thuban-derived architectures, such as Zosma quad-core models with disabled cores, rarely support reliable core unlocking to additional cores due to more permanent fusing or design differences that prevent BIOS-level reactivation.

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