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References
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[1]
[PDF] JEDEC Publication No. 95 TRANSISTORS OUTLINES (TO) ContentsTO-5. Axial Leads, .200 Pin Circle. TO-8. Axial Leads, .281 Pin Circle. TO-9. Axial Leads, .200 Pin Circle. TO-12. Axial Leads, .200 Pin Circle. TO-18. Axial ...
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[2]
[PDF] Metal Can Packages (TO-3/5/8/18/39/46/52/72) - Texas Instruments6 Lead (0.200” Diameter P.C.) TO-5 Metal Can Package. NS Package Number H06C ... the Buyer's risk, and that they are solely responsible for compliance with all ...
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[3]
JEDEC TO-5 Package - TopLine.tvThe JEDEC TO-5 package has 3L pins, 0.200" pitch, 0.315" body diameter, and is used for training, practice, and evaluation. Available in SnPb, Sn100, and Au.
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[4]
Technical details of Transistor Outline (TO) Packages - SCHOTTSCHOTT Transistor Outline (TO) Packages offer high hermeticity, high process stability, and high performance for the protection of sensitive components.
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[5]
TO-5 Package | TO-5 Headers - Electronic Products Inc. (EPI)The TO-5, also known as TO-205AA, is a metal can transistor package ideal for high-power applications, including RF and microwave systems, industrial equipment ...
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Texas Instruments - Transistor History - Google SitesThe 2N332 – 2N336 series date from 1957 and were the first in the industry standard TO-5 package [Bulletin DL-S891 march 1958] The first of these, the 2N332 was ...
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Transistor Museum Photo Gallery Fairchild 2N697 Silicon Mesa ...By 1958, Fairchild began marketing the transistor commercially as the 2N697. These were the best performing silicon transistors available at the time, and were ...
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[8]
Moore's Law and the Seven Devices - EEJournalFeb 7, 2019 · Fairchild commercialized the 2N696 and 2N697, and the first ad for these transistors ran in August, 1958. The prototypes reportedly cost IBM ...
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1958: Silicon Mesa Transistors Enter Commercial ProductionIn early 1958 Fairchild Semiconductor procured its first order, for 100 transistors at $150 apiece from IBM's Federal Systems Division.
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Transistor packages: TO-1, TO-5, TO-92 TO-18 - AMZ FXThe TO-1 package has been used on many germanium transistors: The TO-5 package was also widely used for germanium transistors: The "K" style is a TO-1 with ...
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[11]
[PDF] Hermetic Packages - Texas InstrumentsBecause of the package materials, hermetic packages are able to withstand higher temperatures than the equivalent plastic packages. The construction of hermetic ...
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[12]
TO-5 Component Package - mbedded.ninjaOct 27, 2015 · TO-5 (Transistor Outline 5) is a family of older-style through-hole metal can component packages. The most popular variant is the TO-5-3 (3 lead variant).<|control11|><|separator|>
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[13]
Glass to Metal Seal - an overview | ScienceDirect TopicsThe glass-to-metal seal connects the brittle glass material to a metal with typically rather different thermal expansion coefficients.
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[14]
[PDF] AXIAL LEADS - JEDECTO-5 (See TO-205-AA). Axial Leads, .281 Pin Circle. TO-8 (See TO-233-AA). Axial Leads, .200 Pin Circle. TO-9. Axial Leads, .200 Pin Circle. TO-12 (See TO-205-AB).Missing: standardization | Show results with:standardization
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JEDEC History - Pre-1960s1958. Integrated circuit invented. JEDEC is created to formalize Solid State Device standardization (including transistor circuits used in memory circuits).
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[PDF] A BRIEF HISTORY OF EARLY SEMICONDUCTORSFairchild Semiconductor announced commercial availability of the. 2N696/2N697 silicon double-diffused mesa transistor in August 1958. 1959 The annual production ...
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[17]
The 741 op amp – part 3 - Tiny TransistorsFeb 3, 2021 · It's packaged in a “metal can” type package, which is exactly what it sounds like. These were popular in the 1960s and 1970s to package ...
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[PDF] 1 Attachment A Whitepaper on Semiconductor Die and Packaging ...The typical TO-5 package has a base diameter of 8.9mm, a cap diameter of 8.1mm, and a cap height of 6.3mm. Different manufacturers have different tolerances ...Missing: dimensions | Show results with:dimensions
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Transistor headers I hermetic packages I www.electrovac.comDepending on the glass seal technology, two different types of metal are used: As a compression glass feedthrough: cold-rolled steel with NiFe or kovar pins; As ...
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TO-5 Header - Platronics SealsJEDEC TO-5 header. Applications: general purpose light detection, laser power monitoring, medical analysis, laser communications, pressure sensors, bar code ...Missing: standard | Show results with:standard<|control11|><|separator|>
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[21]
What is the Die Attach process? - Oricus Semicon SolutionsNov 1, 2021 · The backside of the die is usually plated with gold plating. Gold-silicon eutectic bonding is accomplished by placing the chip on the Die Attach ...
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[22]
[PDF] NPN SWITCHING TRANSISTOR 2N2369A - TT ElectronicsTHERMAL PROPERTIES. Symbols Parameters. Min. Typ. Max. Units. RθJA. Thermal Resistance, Junction To Ambient. 486. °C/W. RθJC. Thermal Resistance, Junction To ...
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[23]
[PDF] transistor outline packages - Q-Tech CorporationWide frequency range from 0.045Hz to 125MHz. • Available as QPL MIL-PRF-55310/09 and/10 (TTL) and /12 (CMOS). • Choice of TO packages and pin outs.
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Fine Leak defined | AMADA WELD TECHMilitary standard allowable leak rate for a hermetically sealed package is less than or equal to 5 x 10-8 atm-cc/sec. Request Info Hidden. News & Events - AMADA ...
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[PDF] thermal resistance table 1 - Analog DevicesHigh effective thermal conductivity board (JEDEC 4 layer) was used for the calculations. 3. DFN and QFN package type dimensions are in millimeter. 4. All QFN/ ...
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None**Summary of 2N2218A TO-5 Silicon NPN Transistor:**
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Glass-to-metal seals | SCHOTTHermetic glass-to-metal seals provide gas-tight electrical and optical signal transmission while preventing moisture and gas intrusion.Introduction · Applications · Types · Technology & Design
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[28]
[PDF] TO-39 - Central SemiconductorMIN. MAX. MIN. MAX. A (DIA) 0.335 0.370. 8.51. 9.40. B (DIA) 0.315 0.335. 8.00. 8.51. C. -. 0.040. -. 1.02. D. 0.240 0.260. 6.10. 6.60.Missing: JEDEC | Show results with:JEDEC
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[PDF] 2N2218, A, AL & 2N2219, A, AL - VPT ComponentsFor non-S-suffix devices (T0-5), dimension LL = 1.5 inches (38.10 mm) min. and 1.75 inches (44.45 mm) max. For S-suffix types (T0-39), dimension LL = 0.5 inch ( ...Missing: dissipation | Show results with:dissipation
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[PDF] 2n2218 2n2218a silicon npn transistors - Central SemiconductorPower Dissipation. PD. 800. mW. Power Dissipation (TC=25°C). PD. 3.0. W. Operating and Storage Junction Temperature. TJ, Tstg. -65 to +200. °C. ELECTRICAL ...Missing: dimensions thermal
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[PDF] but33-d.pdf - onsemiTransistors with Base-Emitter. Speedup Diode. The BUT33 Darlington transistor is designed for high–voltage, high–speed, power switching in inductive circuits ...
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[PDF] MIL-DTL-45204D-Gold-Plating-Electrodeposited-.pdf1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent specified herein.
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[PDF] µA741 General-Purpose Operational Amplifiers datasheet (Rev. G)3 Description. The µA741 device is a general-purpose operational amplifier featuring offset-voltage null capability. The high common-mode input voltage ...Missing: 77 hermetic
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[PDF] DECEMBER 1977 RELIABILITY EVALUATION OF HERMETIC ...An extensive study was conducted to evaluate the relative strengths and in-line packages. The study weaknesses of commonly used hermetic flat and dual.Missing: capacity | Show results with:capacity
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[PDF] 8-Pin Metal Header [TO-99]The 8-Pin Metal Header [TO-99] has dimensions such as 0.2500 (6.35) MIN, 0.5000 (12.70) MIN, 0.1850 (4.70) 0.1650 (4.19) and is compliant to JEDEC standards MO ...Missing: ceramic | Show results with:ceramic
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The beauty of ICs - EmbeddedDec 3, 2015 · Of course before we had DIL ICs we had the round TO-99 packages for op-amps and even some old digital ICs. The early 709 and 741 opamps were ...
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ICs Rocket to Success - CHM Revolution - Computer History Museum... Apollo Guidance Computer project was the largest user of ICs through 1965. ... computers used Fairchild Micrologic ICs in this TO-5 style metal can package.
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Package is the First to Accommodate System Design ConsiderationsTypical 1960s transistors used TO-5 or TO-18 (Transistor Outline) metal-can packages with three external leads. Lower-cost plastic versions served applications ...
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Early Electronic Calculators - John Wolff's Web MuseumApr 12, 2020 · These early machines were built entirely with discrete components - thousands of individual transistors, diodes, and resistors. They were large, ...
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[PDF] Radio-Electronics-1970-05.pdfMay 1, 1970 · ... TO -5 pack- ages, operate with supply voltages up to 24. Typical current drain is 4 mA at 4.5 volts and 8 mA at 12 volts. Typical voltage ...
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Semiconductor Packaging History and Primer - SemiWikiMar 9, 2022 · Semiconductor packaging evolved from DIP to QFP, BGA, POP/SiP, and WLP. Early packaging was in ceramic or metal cans, then plastic and DIP.Missing: decline | Show results with:decline
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OLH249 - Skyworks | Products Details... Package Photo. Package Info6-Lead Hermetic TO-5. Radiation TolerantYes. No Base Connection. Features. Radiation-tolerant version of 4N49; Current Transfer Ratio ...
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Satellite Microelectronic Packages | Electronic Products Ind. (EPI)TO-5 package · TO-8 Package · TO-18 Package · TO-39 Package · TO-46 Package ... These packages provide critical protection against vacuum and radiation exposure ...
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Hermetic Packaging Market Share Analysis | Industry Report, 2025 ...The global hermetic packaging market size was estimated at USD 4.01 billion in 2024 and is projected to reach USD 5.90 billion by 2030, growing at a CAGR of ...
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Temperature Cycling - JEDECJESD22-A104F.01 ... This standard applies to single-, dual- and triple-chamber temperature cycling in an air or other gaseous medium and covers component and ...
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[PDF] Solderability JESD22-B102E - JEDEC STANDARDThe purpose of this test method is to provide a means of determining the solderability of device package terminations that are intended to be joined to another ...
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[48]
[PDF] EIAJ ED-7303BEIAJ ED-7303B is a standard for the name and code of semiconductor packages, related to the EIAJ ED-7300 standard.Missing: metric DIN
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IPC 7351 Standards to Design a Footprint - Sierra CircuitsDec 7, 2022 · IPC 7351 PCB footprint standard specifies the optimum size, shape, and tolerance for surface mount pads of your component land pattern.Missing: IEC 60747 DIN TF- EIAJ GOST British BS Chinese GB/ T
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[PDF] MIL-STD-883E-Method-1014.pdf - EB Industriesa. Standaml leak rate. Standard leak rate is defined as that quantity of dry air at 25°C in atmosphere cubic centimeters flowingthrough a leak or multiple ...
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[PDF] Hermetic Cover Seal Process Technology MIL-STD-883 TM 1014 SealMIL-STD-883 TM 1014 seal requires gross leak testing within one hour of removal from helium bombing, and uses the Howl-Mann method to determine leak rates.
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[PDF] fairchild linear integrated circuits - Evil Mad Scientist Laboratoriestendencies make the µA741 ideal for use as a voltage follower. The high gain and wide range of operating voltage provides superior performance in integrator ...
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Basic Info on Tin Whiskers - NASA NEPPJan 17, 2019 · Tin whiskers have been observed to grow to lengths of several millimeters (mm) and in rare instances to lengths in excess of 10 mm. Numerous ...
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[PDF] Package Thermal Characterization - Texas InstrumentsTabular thermal data in this databook list the typical package thermal resistance data from each package family with differ- ent lead counts. θJA data are ...
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IC Package Types | DIP, SMD, QFP, BGA, SOP, SOT, SOICJan 5, 2024 · Here we explained what IC packaging is and the different types of IC Packages like DIP, QFP, BGA, SOP, SMD, QFN, SOIC, and SOT.
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Transistor Outline (TO) Package Market 2025 - Semiconductor InsightTransistor Outline (TO) Package Market was valued at US$ 923.7 million in 2024 and is projected to reach US$ 1.38 billion by 2032, at a CAGR of 5.21%
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Thermal Conductivity of Metals and Alloys: Data Table & Reference ...Thermal Conductivity - k - is the quantity of heat transmitted due to an unit temperature gradient, in unit time under steady conditions.