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Substrate-integrated waveguide

A substrate-integrated (SIW) is a planar structure that emulates the electromagnetic propagation characteristics of a conventional rectangular by embedding two parallel arrays of metallic or posts within a to serve as sidewalls, while top and bottom metallic ground planes enclose the structure, enabling low-loss waveguiding in a compact, integrable format. This design supports dominant TE10 modes similar to air-filled but with a -filled core, where the effective width w_{eff} = w - \frac{d^2}{0.95p} (with w as the via spacing, d as via , and p as via ) ensures confinement of electromagnetic fields and minimal leakage. Developed in the late as an evolution of post-wall and laminated concepts, SIW technology gained prominence in the early through advancements that addressed the integration challenges of bulky metallic waveguides with planar fabrication processes like or LTCC. Key researchers, including J. Hirokawa and M. Ando, introduced early post-wall variants in 1998, while subsequent work by K. Wu and others refined SIW for operation up to millimeter-wave frequencies. The structure's advantages include a high quality factor (Q > 500 at bands), low radiation losses, high power-handling capacity, and compatibility with standard planar circuit technologies, making it superior to microstrips for high-frequency applications while being more cost-effective than machined waveguides. However, limitations such as restricted to about one and increased losses at frequencies above 30 GHz due to via imperfections must be managed through precise design. SIW has become integral to modern RF and microwave systems, particularly for applications requiring compact, high-performance components in the 10–100 GHz range, including filters, power dividers, multiplexers, and antennas for 5G communications, automotive radars, and biomedical sensors. Variants like half-mode SIW (HMSIW) and folded SIW further enhance by reducing size by up to 50% while preserving performance, broadening its use in system-on-substrate platforms. Ongoing research focuses on mitigating losses and enabling active device integration to support emerging and multi-band systems.

Introduction

Definition and Concept

A substrate-integrated waveguide (SIW) is a synthetic rectangular electromagnetic waveguide formed by embedding arrays of metallic vias or posts within a dielectric substrate, bounded by two parallel metal plates on the top and bottom surfaces, thereby creating a rectangular cross-section that confines and guides electromagnetic wave propagation. This structure emulates the behavior of traditional hollow rectangular waveguides while being fully integrated into a planar form. The core concept of SIW lies in merging the advantageous properties of conventional rectangular waveguides—such as low and high quality factor ()—with the fabrication simplicity and compactness of planar transmission lines like circuits. In operation, electromagnetic waves, primarily in the dominant TE10 mode, propagate along the axis within this shielded environment, exhibiting and field distributions analogous to those in metallic waveguides, making SIW particularly suitable for and millimeter-wave frequency bands. SIW is synonymous with variants such as post-wall waveguide, which uses periodic metallic posts to form sidewalls, and laminated waveguide, which employs layered substrates for . Key advantages include significantly reduced weight, volume, and manufacturing costs relative to bulky metallic , alongside seamless compatibility with standard (PCB) and low-temperature co-fired ceramic (LTCC) processes for monolithic of components.

Historical Development

The substrate-integrated waveguide (SIW) technology evolved from earlier concepts such as post-wall waveguides introduced by J. Hirokawa and M. Ando in 1998 and laminated waveguides, with the via-based planar form advanced in the early 2000s by Ke Wu and collaborators at the Poly-Grames Research Center of École Polytechnique de Montréal. Initial demonstrations of SIW appeared in publications from 2001 that integrated lines and rectangular waveguides into a planar form using substrates and metallic vias. This development addressed the need for low-loss, compact guided-wave structures suitable for millimeter-wave frequencies, effectively bridging the performance gap between high-loss planar transmission lines like and bulky non-planar rectangular waveguides. Key milestones followed rapidly, including a 2003 IEEE paper that analyzed the characteristics of SIW structures implemented in low-temperature (LTCC) substrates, establishing foundational modeling techniques for guided-wave behavior. Between 2006 and 2010, research surged with the design and implementation of SIW-based components such as filters, power dividers, and antennas, leveraging the technology's compatibility with standard processes for enhanced integration in microwave systems. Post-2010, SIW saw widespread adoption in millimeter-wave applications, particularly for communications, where it enabled efficient networks and high-frequency transceivers. The technology evolved with variants like the half-mode SIW (HMSIW), introduced in to reduce structure size by approximately 50% while maintaining similar propagation properties, facilitating compact antennas and couplers. In the , multilayer SIW configurations emerged to support complex circuits with , as demonstrated in designs for networks operating at 24 GHz. As of 2025, SIW is extensively used in commercial radio-frequency integrated circuits (RFICs) for and beyond, with ongoing research extending its application to frequencies through innovations like air-filled structures for reduced losses at D-band and higher.

Design Principles

Geometry and Dimensions

The substrate-integrated waveguide (SIW) features a planar structure composed of a dielectric substrate clad with metallic ground planes on the top and bottom surfaces, flanked by two parallel rows of metallic vias that connect the ground planes and serve as lateral sidewalls to confine electromagnetic fields within the guide. These vias, typically cylindrical in shape with diameter d, are arranged with a center-to-center period p along the propagation direction, while the substrate has a height h (equivalent to the separation between ground planes), a width w (center-to-center distance between the via rows), and a length l defining the active section of the waveguide. The vias can be implemented as through-holes plated with metal or blind vias, effectively replicating the confining role of solid metallic walls in traditional rectangular waveguides while enabling integration with planar circuits. To ensure effective field containment and minimize electromagnetic leakage through the gaps between adjacent vias, the diameter-to-period ratio d/p is typically 0.5 or greater (with p \leq 2d), with optimal performance for low leakage achieved when d/p \approx 0.5 to $0.8. Substrate dimensions are selected based on fabrication standards and operating requirements, with the h commonly ranging from 0.5 mm to 1.27 mm to align with commercial (PCB) processes using materials like Rogers RT/Duroid. The length l varies according to the specific component or length, while the width w is dimensioned to support guided wave propagation. Key design guidelines emphasize preventing losses by limiting the via period p to no more than \lambda_g / 5 (where \lambda_g is the guided ) and ensuring p \leq 2d for tight sidewall approximation. Additionally, to facilitate of the dominant akin to that in rectangular waveguides, an of approximately w/h \approx 2 is recommended, providing a balanced cross-section for efficient field distribution. Conceptually, the SIW cross-section resembles a rectangular with top and bottom walls and perforated sidewalls formed by the via array, while the top view shows a rectangular strip bounded by staggered or aligned via rows along the longitudinal axis; this configuration approximates the geometry of a conventional dielectric-filled rectangular for analysis purposes.

Effective Width and Waveguide Equivalence

The effective width of a substrate-integrated waveguide (SIW) accounts for the effect introduced by the periodic array of metallic vias that form its sidewalls, providing a means to map the SIW's physical dimensions to those of an equivalent rectangular (RWG) for simplified analysis. The physical width w of the SIW, measured as the center-to-center distance between the rows of vias, is adjusted to yield the effective width w_{\text{eff}} using the w_{\text{eff}} = w - \frac{d^2}{0.95 p}, where d is the of the vias and p is the (center-to-center spacing) between adjacent vias in a row. This adjustment compensates for the finite size and spacing of the vias, which effectively narrow the guiding region compared to an ideal metallic sidewall. A refined version of the formula, incorporating higher-order corrections, is given by w_{\text{eff}} = w - \frac{1.08 d^2}{p} + \frac{0.1 d^2}{w}, offering improved accuracy for practical via dimensions. The equivalence between an SIW and an RWG is established when the SIW's propagation characteristics, such as the and , closely match those of an RWG with width a = w_{\text{eff}} and height b = h (the thickness). This holds under the criterion that the via pitch p is sufficiently small, typically p < \lambda / 10 (where \lambda is the guided wavelength), ensuring negligible radiation leakage through the gaps between vias. Derivations of this equivalence often employ boundary integral-resonant mode expansion (BI-RME) methods to model the sidewall discontinuities or analytical continuation of surface impedances along the via walls to match RWG boundary conditions, thereby equating the propagation constants \beta for dominant TE_{10} modes. Perturbation theory can also be applied to approximate the shift in effective width due to the periodic via loading, aligning the SIW's modal fields with those of a dielectric-filled RWG. This mapping enables designers to leverage established RWG formulas for key parameters, such as cutoff frequency f_c = c / (2 a \sqrt{\epsilon_r}) (with c the speed of light and \epsilon_r the substrate permittivity) and attenuation, directly in SIW applications without resorting to full-wave simulations for initial designs. For dense via arrays satisfying the spacing criterion, the equivalence yields errors below 1% in predicted cutoff frequencies and propagation constants compared to rigorous numerical results. However, the approximation degrades at lower frequencies or with sparse via spacing (larger p), where increased leakage through the sidewall gaps alters the effective boundary conditions and introduces additional radiation losses, necessitating full-wave verification.

Propagation Characteristics

Supported Modes

Substrate-integrated waveguides (SIWs) primarily support transverse electric (TE) modes, which are analogous to those in conventional rectangular waveguides (RWGs), due to the boundary conditions imposed by the metallic vias forming synthetic magnetic walls along the sidewalls. These vias prevent the propagation of transverse magnetic (TM) modes, as any attempt to excite TM modes results in radiation leakage through the gaps between adjacent vias, effectively suppressing them. The dominant mode in SIW is the TE_{10} mode, which possesses the lowest cutoff frequency and is characterized by a uniform field distribution across the substrate height and a half-sinusoidal variation across the effective width a_{eff}. For the TE_{10} mode, the primary electric field component E_y varies as \sin(\pi x / a_{eff}), the longitudinal electric field E_z is zero, while the longitudinal magnetic field H_z varies as \cos(\pi x / a_{eff}), and the transverse magnetic field H_x varies as \cos(\pi x / a_{eff}). This mode is excited by transverse electric fields applied across the broad walls, maintaining a well-confined field similar to that in an equivalent RWG. Higher-order TE modes, such as TE_{20}, TE_{30}, and TE_{11}, can propagate above their respective cutoff frequencies, exhibiting more complex field patterns with additional variations along the width or height directions; for instance, the TE_{20} mode has E_y \propto \sin(2\pi x / a_{eff}). These modes maintain orthogonality with the dominant TE_{10} mode, allowing independent excitation and analysis, though SIW designs typically dimension the structure to avoid their propagation for single-mode operation. The strategic placement of vias along the sidewalls further aids in suppressing unwanted higher-order TE modes and any residual TM attempts.

Cutoff Frequency and Dispersion

The cutoff frequency of a substrate-integrated waveguide (SIW) for the TE_{mn} mode is determined by the standard rectangular waveguide formula adapted to the effective dimensions of the structure, given by f_c = \frac{c}{2\sqrt{\varepsilon_r}} \sqrt{\left(\frac{m}{a}\right)^2 + \left(\frac{n}{b}\right)^2}, where c is the speed of light in vacuum, \varepsilon_r is the relative permittivity of the substrate, a is the effective width w_\text{eff}, b is the substrate height h, and m and n are the mode indices. This expression arises from the boundary conditions imposed by the metallic vias and top/bottom planes, which emulate the sidewalls of a conventional filled with the substrate material. For the dominant TE_{10} mode, the cutoff frequency simplifies to approximately f_{c10} \approx c / (2 a \sqrt{\varepsilon_r}), which sets the lower limit for signal propagation and largely dictates the operational bandwidth of the SIW. Operation below this frequency results in evanescent waves, while frequencies above enable guided propagation; typical designs target center frequencies well above f_{c10} to ensure efficient single-mode performance. The dispersion characteristics of SIW are analogous to those of a , with the propagation constant \beta described by \beta = k \sqrt{1 - (f_c/f)^2}, where k = 2\pi f / c_\text{eff} is the free-space wavenumber adjusted for the effective speed c_\text{eff} = c / \sqrt{\varepsilon_r}, and f is the operating frequency. This dispersive behavior leads to a phase velocity greater than c_\text{eff} near cutoff, approaching c_\text{eff} at higher frequencies, which is critical for designing broadband components where group delay variations must be minimized. The SIW's dispersion closely matches that of an ideal (RWG) when the via array provides sufficient sidewall confinement. Bandwidth limitations in SIW arise from the need to maintain single-mode operation, typically spanning from f_{c10} to approximately $2 f_{c10} to suppress higher-order modes such as TE_{20} or TE_{11}, allowing single-mode operation over approximately one octave (from f_{c10} to $2 f_{c10}). In practical designs, the usable bandwidth may be narrower depending on component requirements. Deviations from ideal RWG dispersion occur due to the filling factor (defined by via diameter d and spacing s), with lower via densities (larger s/d) increasing leakage and altering the effective width, thereby shifting cutoff frequencies and introducing slight dispersion anomalies compared to a continuous sidewall. Optimal performance requires s/d < 2.5 (or d/s > 0.4), with s/d \approx 2 recommended to minimize these effects while keeping radiation losses low.

Fabrication and Materials

Substrate and Conductor Selection

Substrate-integrated waveguides (SIWs) require low-loss substrates to ensure efficient wave with minimal , particularly at and millimeter-wave frequencies. Common selections include /ceramic laminates such as Rogers RO4003C, which features a ε_r of approximately 3.38 ± 0.05 and a loss tangent tan δ of 0.0027 at 10 GHz, enabling reliable performance in SIW designs up to tens of GHz. Another option is (PTFE), or Teflon, with ε_r ≈ 2.1 and tan δ ≈ 0.0002–0.0004, which supports SIW operation up to 100 GHz due to its exceptionally low losses and high-frequency stability. For conductors, is the standard material for the top and bottom cladding layers as well as the metallic vias that form the sidewalls, providing high (σ ≈ 5.8 × 10^7 S/m) and ease of integration with planar fabrication processes. The copper thickness must exceed the skin depth to minimize conduction losses, which is approximately 0.66 μm at 10 GHz. At higher frequencies, is often applied over to prevent oxidation and maintain low , enhancing reliability in millimeter-wave SIW components. Key parameters guiding substrate selection include the dielectric constant ε_r, which scales the physical dimensions of the SIW for a given operating ; the loss tan δ, which governs dielectric absorption and should be minimized for low ; and thermal stability, ensuring compatibility with fabrication temperatures up to 200–300°C without degrading electrical properties. Trade-offs in material choice involve balancing compactness and performance: a higher ε_r, as in substrates like alumina (ε_r ≈ 9.8), reduces SIW size by lowering the for equivalent but exacerbates , leading to greater nonlinearity over . Conversely, low-cost substrates (ε_r ≈ 4.4, tan δ ≈ 0.02) are restricted to applications below 10 GHz due to their high losses, which cause excessive signal at higher frequencies. Environmental factors, such as moisture absorption, can destabilize ε_r; for instance, hygroscopic substrates may experience an increase in ε_r by 0.1–0.5 units upon exposure, altering propagation characteristics, whereas low-absorption materials like (maximum 0.06% uptake) maintain ε_r stability in humid conditions. These selections directly influence conduction and dielectric losses in SIW, as explored in subsequent sections.

Manufacturing Techniques

Substrate-integrated waveguides (SIWs) are primarily fabricated using standard (PCB) processes, which enable low-cost production through multilayer lamination of substrates with cladding to form the top and bottom conductive planes. This approach is widely adopted for prototypes and low-volume manufacturing due to its compatibility with conventional PCB facilities and reduced complexity compared to metallic . Via formation is a key step, where arrays of cylindrical serve as the lateral walls of the ; these are typically created by mechanical for through-vias, followed by with to ensure electrical continuity between layers, or by filling with conductive paste for simpler prototypes. is employed for blind or buried vias to achieve higher precision in multilayer stacks. Via diameters generally range from 0.2 to 0.5 mm, with center-to-center spacing less than twice the diameter to prevent radiation leakage. Metallization of the ground planes and top conductors relies on laminated foils, which are patterned using photolithographic to define apertures and any integrated features like feed lines. For enhanced uniformity in high-frequency applications, or evaporation can deposit thin metal layers (e.g., /) on via sidewalls or surfaces, often followed by selective . Advanced fabrication methods include low-temperature co-fired ceramic (LTCC) processes for mm-wave SIWs requiring high integration density; here, green ceramic tapes are screen-printed with conductive pastes, stacked, and co-fired at temperatures below 900°C to form embedded vias and multilayer structures without post-firing machining. For rapid prototyping, 3D printing techniques deposit dielectric substrates (e.g., PLA or photopolymers) layer-by-layer, with conductive silver or inks extruded or inkjet-printed to create vias and metallization patterns, enabling complex geometries in a single build. Recent advancements as of 2025 include air-filled substrate-integrated waveguides (AFSIW), which incorporate suspended structures or air cavities to minimize losses, fabricated using multilayer with selective or molding to create air gaps. Additionally, SIW on substrates utilizes through-glass vias (TGVs) formed by or chemical , filled with conductive materials like tin or , offering superior thermal and electrical performance for millimeter-wave and applications. Quality control emphasizes precise via alignment, with tolerances below 0.1 mm essential to maintain integrity and minimize deviations (e.g., up to 40 μm dimensional accuracy in etched features). Post-fabrication tuning often involves computer (CNC) milling to refine widths or slot dimensions, compensating for process variations while ensuring compatibility with selected substrates and conductors.

Interconnections and Transitions

To Planar Transmission Lines

Transitions from substrate-integrated waveguides (SIWs) to planar transmission lines, such as and (CPW), are essential for integrating SIW structures with conventional planar circuits in and millimeter-wave systems. These transitions enable seamless interfacing between the waveguide-like propagation in SIWs and the open or quasi-TEM modes of planar lines, facilitating compact hybrid designs without bulky connectors. The primary challenges involve , mode conversion suppression, and minimizing insertion losses across desired bandwidths. Microstrip-to-SIW transitions commonly employ tapered or stepped techniques to bridge the and mode differences between the microstrip line and the SIW. Linear or exponential tapers are used, gradually varying the width from the microstrip width w_m to the effective SIW width w_{\text{eff}}, typically over a of \lambda/4 at the center frequency to achieve quarter-wave . This design ensures smooth field distribution and reduces reflections, with the taper profile optimized using analytical models for the microstrip section and curve-fitting for the abrupt step into the SIW. With proper sizing, better than -20 dB can be achieved across the single-mode of the SIW. For (CPW) transitions to SIW, a direct via connection is often utilized, where the central of the CPW is linked to the SIW via a plated through-hole, and ground stitching vias are placed along the sidewalls to confine fields and minimize unwanted slotline . This leverages the grounded CPW (GCPW) for better with SIW's metallic boundaries, achieving broadband performance through multi-section transformers if needed. Insertion losses of 0.5-1 are typical at frequencies from 10 to 30 GHz, with the symmetric grounding arrangement suppressing conversion by ensuring balanced field symmetry and preventing parasitic slotline propagation.

To Conventional Waveguides

Transitions from substrate-integrated waveguides (SIWs) to conventional rectangular waveguides (RWGs) enable hybrid integration of planar and non-planar components, facilitating low-loss connections in systems requiring both technologies. These transitions are essential for interfacing SIW-based circuits with standard metallic , such as in fixtures or high-power applications where RWGs offer superior handling capabilities. Common designs address impedance mismatches arising from differences in waveguide dimensions and filling media, typically achieving operation through tapered structures or multi-element matching networks. A fundamental approach involves back-to-back RWG-to-SIW transitions using via probes or ridge tapers to excite the dominant 10 mode. In probe-based designs, a metallic via extends from the SIW into the RWG cavity, with the probe length optimized to approximately λg/4 to provide quarter-wave impedance transformation and effective mode coupling. Ridge taper methods, conversely, incorporate a gradually narrowing ridge structure within the RWG to match the of the SIW, reducing reflections at the interface. These techniques are often implemented in back-to-back configurations for , ensuring minimal mode conversion. Design parameters typically include embedding the SIW within a WR-band flange for mechanical stability, with the substrate height h extended to the RWG height b via pyramid or linear tapers to accommodate the larger cross-section of the RWG. For instance, in V-band implementations, the taper profile is engineered to gradually expand the effective waveguide width, aligning the cutoff frequencies and dispersion characteristics of both structures—principles rooted in waveguide equivalence models. Broadband enhancements employ multi-step transformers or exponential ridge profiles, yielding fractional bandwidths of 20-40%, such as 26% in height-stepped tapered designs or up to 35% in multi-layer configurations with stepped apertures. Measured performance of these transitions demonstrates high efficiency exceeding 95% and better than -15 over operational bands, as verified in prototypes for K- and V-bands used in vector network analyzer setups. Insertion losses remain below 0.8 , supporting accurate characterization of SIW components without significant signal degradation. As an alternative for seamless integration, substrate extensions incorporate an embedded RWG section milled or laminated within the , minimizing air gaps and enabling direct mounting with efficiencies above 90%. These methods prioritize fabrication compatibility with processes while maintaining equivalence to traditional RWG performance.

Losses in SIW

Conduction Losses

Conduction losses in substrate-integrated waveguides (SIWs) primarily arise from ohmic dissipation due to finite of the metallic top and bottom plates as well as the via array, where surface currents induce resistive heating along these structures. These losses are analogous to those in conventional rectangular waveguides but adapted to the planar geometry, with currents flowing longitudinally on the broad walls and circumferentially around the vias that form the lateral boundaries. The mechanism is governed by the skin effect, confining currents to a thin layer near the surfaces, leading to power dissipation proportional to the square of the tangential intensity. The attenuation constant due to conduction losses, \alpha_c, can be derived from the power loss formula, where the time-average power dissipated in the conductors is given by P_{\text{loss}} = \frac{1}{2} R_s \int | \mathbf{H}_{\tan} |^2 \, dA, with R_s as the surface resistivity and the integral over all conducting surfaces. The propagation constant \alpha_c is then \alpha_c = P_{\text{loss}} / (2 P_t), where P_t is the transmitted power; for the dominant TE_{10} mode in SIW, this yields \alpha_c \approx \frac{R_s}{\eta b w_{\text{eff}}} \left(1 + \frac{2b}{w_{\text{eff}}} \left( \frac{f_c}{f} \right)^2 \right), with \eta the free-space impedance, b the substrate thickness, w_{\text{eff}} the effective width (accounting for via displacement), f_c the cutoff frequency, and f the operating frequency. This expression is obtained by approximating the magnetic field distribution from waveguide theory and integrating over the current paths, with higher losses at bends or discontinuities due to increased current density. The via array contributes additional conduction losses through current crowding at the metallic posts, where the non-uniform current distribution (exhibiting twofold ) can introduce up to a 4% error in loss calculations compared to ideal continuous walls; these effects are minimized by using dense via spacing (typically p/d < 2, where p is via pitch and d via diameter) to approximate a perfect magnetic conductor boundary. Frequency dependence follows \alpha_c \propto \sqrt{f} owing to the skin effect, as R_s = \sqrt{\pi f \mu / \sigma} increases with the square root of frequency, where \sigma is the conductor conductivity and \mu the permeability. For copper conductors at 10 GHz, typical \alpha_c values range from 0.03 to 0.1 dB/cm, often negligible compared to other loss mechanisms in low-loss substrates but becoming significant at millimeter-wave frequencies. Mitigation strategies include using thicker metal plating (exceeding three skin depths, approximately 2 \mum for copper at 10 GHz) to reduce effective resistance and applying silver coatings, which offer about 5% lower R_s than copper due to higher conductivity, thereby reducing \alpha_c by up to 20% in high-frequency designs. Copper remains the standard conductor material for its compatibility with PCB fabrication, though silver plating is employed in performance-critical applications.

Dielectric Losses

Dielectric losses in substrate-integrated waveguides (SIWs) stem from energy dissipation in the substrate material through dielectric relaxation processes, which are directly proportional to the material's loss tangent, tan δ. This dissipation occurs as the electromagnetic fields interact with the dielectric, converting a portion of the wave energy into heat. The attenuation constant due to these dielectric losses, denoted as α_d, can be expressed as \alpha_d = \frac{k \tan \delta}{2}, where k represents the wavenumber in the dielectric medium. This formulation highlights the direct dependence on both the material properties and the wave propagation characteristics. The distribution of the electric field plays a key role in determining the extent of these losses; in TM modes, the electric field more fully occupies the substrate volume compared to TE modes, resulting in higher dielectric losses for TM propagation. Dielectric losses exhibit a frequency scaling of α_d ∝ f for typical dielectric materials with constant tan δ, making them increasingly significant at higher frequencies; in low-tan δ substrates, they often dominate the total attenuation above 20 GHz. For instance, using RO4003 substrate (with ε_r = 3.38 and tan δ = 0.0027), the dielectric attenuation is approximately 0.05 dB/cm at 10 GHz, whereas air-filled waveguide variants exhibit negligible dielectric losses since no substrate is present to cause dissipation. To mitigate dielectric losses, designers can select substrates with reduced tan δ values or employ partial air-filling techniques, such as introducing grooves or air-cut regions within the structure, which decrease the effective dielectric volume exposed to the fields.

Radiation Losses

Radiation losses in substrate-integrated waveguides (SIWs) primarily arise from electromagnetic leakage through the imperfect boundaries formed by the array of vias that simulate the sidewalls of a conventional rectangular waveguide. These losses occur due to the finite gaps between adjacent vias, which act as narrow slots allowing power to radiate into the surrounding space, particularly when the via spacing p exceeds \lambda/10, where \lambda is the guided wavelength. Additional sources include openings at end-launch transitions and discontinuities such as bends, where field fringing exacerbates leakage. Geometry imperfections, such as variations in via diameter or positioning, can further contribute to these losses by altering the effective boundary conditions. Modeling of radiation losses often employs the perturbation method to derive the attenuation constant \alpha_r, which quantifies the leakage. A semi-analytical formula for \alpha_r is given by \alpha_r \approx \frac{k_0^2}{\beta} (\epsilon_r - 1) \left( \frac{p}{\lambda} \right)^2 F(x), where k_0 is the free-space wavenumber, \beta is the propagation constant, \epsilon_r is the relative permittivity of the substrate, and F(x) is a geometry-dependent factor. For well-confined modes where p \ll \lambda, the leaked power exhibits exponential decay away from the structure, ensuring minimal overall loss if the spacing is sufficiently small. This approach highlights the leakage as a perturbation to the ideal waveguide mode. The frequency dependence of radiation losses shows an increase above the cutoff frequency, as higher frequencies lead to larger \lambda relative to p, but losses peak near the onset of higher-order modes where mode coupling enhances leakage. Quantification through full-wave simulations and measurements indicates that \alpha_r < 0.01 dB/cm can be achieved for p < \lambda/20, with experimental validation often performed using S-parameters on open SIW structures to isolate radiation from other loss mechanisms. These values establish the scale of impact, confirming SIWs' suitability for low-loss applications when properly designed. Mitigation strategies focus on enhancing boundary integrity, such as using denser via arrays to reduce slot widths, incorporating inductive posts to suppress slot resonances, or applying metal shields over the structure to reflect leaked fields back into the guide. These techniques effectively minimize \alpha_r across broad frequency bands, preserving the high-Q characteristics akin to conventional waveguides.

Applications

Antennas and Radiators

Substrate-integrated waveguide (SIW) structures enable the design of compact antennas and radiators by integrating waveguide-like propagation with planar fabrication techniques, allowing controlled through engineered apertures or leaks. These antennas leverage the dominant TE10 mode of the SIW for excitation, providing low-loss guidance while facilitating radiation patterns suitable for high-frequency applications. Leaky-wave antennas based on SIW utilize periodic slots or apertures along the to induce controlled leakage, enabling beam scanning capabilities. In these designs, occurs via fast-wave mechanisms (where the phase constant β is less than the free-space k0, allowing broadside ) or slow-wave mechanisms (β > k0 for end-fire directions), achieved by perturbing the through slot periodicity. A seminal implementation involves transverse slots etched on the top metallization, interrupting the surface current to radiate in the forward direction. Slot array antennas in SIW configurations feature longitudinal or transverse slots etched into the top plate, excited by the propagating 10 mode to produce uniform or tapered amplitude distributions for enhanced . These arrays achieve broadside with gains typically ranging from 10 to 15 dBi and efficiencies exceeding 80% at millimeter-wave frequencies, such as 28 GHz for applications. For instance, half-mode SIW (HMSIW) variants reduce the structure size by approximately 50% compared to full-mode designs while maintaining comparable performance, as demonstrated in Ka-band slot arrays with 12 dBi gain and 15% impedance bandwidth. End-fire radiators employ tapered SIW geometries, such as linearly or exponentially flared sections, to generate directive patterns along the axis, often integrated with or SIW feeds for . These designs yield gains of 10-12 dBi with narrow beamwidths (e.g., 20° × 15° at 28 GHz) and are favored for their simplicity in array integration. Broadside radiators, conversely, use cavity-backed slots or patches within SIW enclosures to direct energy perpendicular to the substrate, achieving high front-to-back ratios (>20 dB) and efficiencies around 70-80%. In and emerging systems, SIW antennas offer advantages through their low-profile, compact form factors ideal for conformal arrays in mobile devices and base stations, supporting measured radiation patterns with sidelobe levels below -15 dB and bandwidths up to 20%. Recent advancements include SIW antennas for full-duplex applications at millimeter-waves, enhancing in bidirectional communications as of 2024. Their planar integration minimizes packaging issues at mm-waves, enabling efficient with minimal (< -25 dB).

Filters and Passive Circuits

Substrate-integrated waveguide (SIW) technology enables the realization of compact bandpass filters through resonant structures such as iris-loaded or post-loaded cavities, which provide high selectivity and low loss in and millimeter-wave bands. Iris-loaded designs utilize metallic vias or slots to control inter- coupling, achieving fractional of 5-20% with unloaded quality factors exceeding 500 in optimized configurations using low-loss substrates. For instance, a post-loaded SIW filter at 10 GHz demonstrates a Q factor of approximately 600, insertion below 1.5 dB, and a 3-dB of 8%, suitable for narrowband applications in systems. These structures leverage the waveguide-like confinement of SIW to minimize losses while maintaining planar fabrication compatibility. Directional couplers in SIW are commonly implemented using multisection coupled line configurations, where parallel SIW sections with varying spacing achieve controlled power splitting. Typical performance includes coupling factors of -10 to -20 and isolation greater than 20 across bandwidths up to 20%, with return losses better than 15 , making them ideal for networks. A broadband SIW directional coupler operating at Ku-band exhibits -16 coupling, 25 isolation, and insertion loss under 0.8 over 12-18 GHz, fabricated on standard substrates. These couplers benefit from SIW's inherent shielding, reducing in dense integrated circuits. Other passive components, such as power dividers and multiplexers, exploit SIW's modal properties for efficient signal distribution. T-junction power dividers in SIW use symmetric via placements to achieve equal or arbitrary splitting ratios with bandwidths exceeding 10%, and losses above 15 ; for example, an E-plane T-junction divider at 60 GHz provides 3 splitting with isolation over 20 . Multiplexers leverage mode in dual-mode SIW cavities to separate channels, enabling compact diplexers with insertion losses below 1 and channel isolation greater than 30 , as demonstrated in a balanced-to-unbalanced at X-band. Half-mode SIW (HMSIW) variants offer compactness for filter designs by halving the cavity width while preserving dominant mode propagation, reducing size by 50% compared to full SIW equivalents. A HMSIW at 5 GHz achieves measured of 0.9 dB, fractional of 12%, and out-of-band rejection over 40 dB, integrated with defected structures for enhanced selectivity. Such designs maintain low through via fencing, suitable for size-constrained environments. The planar nature of SIW facilitates seamless integration with monolithic microwave integrated circuits (MMICs), allowing direct transitions to lines for hybrid assemblies without bulky connectors. Tunability is achieved by incorporating varactor diodes into walls or posts, enabling center frequency adjustments over 20-30% ranges with minimal degradation in ; a varactor-loaded SIW tunes from 4.5 to 5.5 GHz with insertion loss varying from 1.2 to 2.0 . This approach supports reconfigurable systems in communications, with brief interfacing via tapered transitions to planar lines for overall circuit embedding.

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