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VIA C7

The VIA C7 is a family of low-power x86 central processing units (CPUs) developed by Centaur Technology and sold by VIA Technologies, first launched in May 2005 as the company's seventh-generation processor line targeted at embedded systems, thin-and-light notebooks, mini PCs, and energy-efficient desktops.^[1] Built on a 90 nm silicon-on-insulator (SOI) process with a compact 30 mm² die size, the C7 features the proprietary Esther core, supporting clock speeds from 1.0 GHz to 2.0 GHz, a VIA V4 bus interface up to 800 MHz, 64 KB L1 instruction and data caches, and a 128 KB L2 cache.^[1]^[2] It emphasizes ultra-low power consumption, with idle power as low as 100 mW and a thermal design power (TDP) of approximately 20 W at peak for most models, enabling fanless operation and up to 40% cooler performance compared to contemporary competitors.^[1]^[2] Key variants include the standard C7 for general embedded and mini-PC applications, the C7-M for mobile and ultra-portable devices with optimized power-saving modes like Deeper Sleep (0.5 W), and the C7-D desktop edition, which maintains similar efficiency but supports slightly higher TDPs up to 25 W for productivity-focused systems.^[2]^[3] All models incorporate instruction set support for MMX, SSE, SSE2, and SSE3 to enhance multimedia and graphics processing, alongside VIA's PadLock hardware security suite, which provides on-die acceleration for AES encryption, SHA-1/SHA-256 hashing, random number generation, and Montgomery multipliers for public-key cryptography up to 32,768-bit keys.^[1]^[2] Packaged in the low-profile nanoBGA2 format (21 mm × 21 mm, 400 pins), the C7 family also includes thermal management features such as Thermal Monitor 1/2 and catastrophic protection, dual-processor symmetric multiprocessing (SMP) capability, and execute protection (NX bit) for enhanced security and reliability in diverse applications like home media centers, personal video recorders, and green computing initiatives.^[1]^[2] The C7-D variant notably earned recognition as the world's first carbon-free computer component through VIA's CO2 offset programs involving energy conservation and reforestation.^[3]

Development History

Origins and Design Goals

In 1999, VIA Technologies, a Taiwanese chipset manufacturer, acquired Centaur Technology from Integrated Device Technology (IDT) to bolster its x86 processor capabilities, integrating Centaur's expertise in low-power CPU designs into its portfolio.^[4] This move followed VIA's earlier acquisition of Cyrix assets and positioned the company to develop in-house x86 solutions, leveraging Centaur's Austin, Texas-based team for ongoing innovation in efficient processors.^[5] The VIA C7 emerged as an evolutionary advancement from the VIA C3 series, particularly the Nehemiah core, which had emphasized power efficiency but required further refinement to meet emerging demands for portable computing.^[6] Internal development at Centaur began around 2003-2004, shortly after the C3's production peak, driven by the need to address growing market interest in compact, battery-friendly devices amid the rise of mobile and silent computing applications.^[7] Key design goals for the C7 centered on achieving ultra-low power consumption to target mobile and embedded markets, with objectives including an average draw under 1W and idle power as low as 0.1W, while maintaining full x86 compatibility.^[1] Engineered on IBM's 90nm silicon-on-insulator (SOI) process, the processor prioritized a compact 30mm² die size for cost-effectiveness and scalability, alongside efforts to narrow performance disparities with leading Intel and AMD offerings without introducing excessive thermal requirements.^[1] These priorities enabled applications in thin-and-light notebooks, mini PCs, and fanless systems, reflecting VIA's focus on balancing efficiency, security features like the PadLock engine, and broad platform versatility.^[8]

Announcement and Production Variants

The VIA C7 processor family was officially announced by VIA Technologies on May 27, 2005, ahead of the Computex Taipei trade show where the C7-M variant was unveiled on June 1.^[1]^[9] Initial engineering samples became available to select partners shortly after the announcement to support early integration and testing.^[8] Mass production commenced by the end of the second quarter of 2005, with full commercial availability ramping up in late 2005 and continuing through 2006.^[8] The processors were fabricated exclusively on IBM's 90 nm silicon-on-insulator process node throughout their lifecycle, enabling compact die sizes as small as 30 mm².^[1] Production of the C7 family persisted until approximately 2010, though VIA began transitioning to the higher-performance VIA Nano (Isaiah) architecture in 2008, marking the effective end of new C7 development.^[10] The C7 lineup encompassed several production variants tailored to different market segments. The standard C7 targeted desktop and server applications, offering clock speeds from 1.0 GHz to 2.0 GHz with front-side bus (FSB) options of 400 MT/s, 533 MT/s, or 800 MT/s, typically in FCPGA packaging for socket compatibility.^[1] The C7-M variant focused on mobile and embedded uses, spanning 1.0 GHz to 1.8 GHz with ultra-low voltage configurations for power-sensitive designs, and was housed in the compact 21 mm × 21 mm NanoBGA2 package to facilitate thin-client and notebook integration.^[9] A desktop-specific iteration, the C7-D, provided speeds from 1.5 GHz to 1.8 GHz in NanoBGA2 packaging, emphasizing slightly higher thermal design power for non-mobile systems while maintaining low overall consumption.^[11] Complementing these, the Eden series represented a fanless, low-power subset of the C7 architecture optimized for silent embedded applications, such as thin clients and digital signage, with models like the Eden 900 at 1.0 GHz and reduced TDP ratings down to 1 W. Additionally, a dual-core C7-D prototype was developed but saw only limited release to select partners for evaluation, without entering broad production.^[12] Representative models illustrate the family's diversity. The C7 2000 operated at 2.0 GHz with an 800 MT/s FSB and 25 W TDP, often designated under OEM part numbers like VT4004VH002 or similar for custom integrations. In contrast, the C7-M 1600 ran at 1.6 GHz with a 400 MT/s FSB and 15-20 W TDP, available in NanoBGA2 (e.g., part number VT4004M1600) for embedded boards and mobile platforms. These variants supported VIA's emphasis on efficiency, with packaging options like NanoBGA2 enabling dense, low-profile deployments in space-constrained devices.^[2]

Architecture

Esther Core

The Esther core, codenamed C5J, serves as the central microarchitecture of the VIA C7 processor family, implementing a single-core, in-order x86 design that evolved from the preceding VIA C3's Nehemiah core.^[1]^[13] This architecture prioritizes low power consumption and compact size, featuring an enhanced front-end with improved branch prediction and prefetching mechanisms to boost instruction fetch efficiency in power-constrained environments.^[14] The core's in-order execution model avoids complex out-of-order scheduling, emphasizing straightforward x86 instruction decoding to maintain simplicity and reduce transistor overhead.^[15] The pipeline structure consists of a 16-stage integer pipeline, enabling sustained execution of basic operations. A key innovation is the "Twin Turbo" dynamic clocking system, which employs dual phase-locked loops (PLLs)—one for high-speed operation and another for lower frequencies—to seamlessly adjust core and bus clocks without performance stalls, facilitating rapid transitions between power states.^[14] This approach integrates with the VIA CoolStream architecture to minimize energy use during varying workloads.^[9] The execution units comprise one floating-point unit (FPU) for scalar operations and an enhanced integer multiplier, including hardware support for Montgomery multiplication optimized for cryptographic tasks, alongside standard arithmetic logic capabilities focused on efficient handling of x86 instructions.^[13] Unlike contemporary out-of-order designs, the Esther core relies on these units for sequential processing, prioritizing reliability and low latency in decode-heavy scenarios over peak throughput.^[6] Compared to the C3 Nehemiah core, the Esther microarchitecture introduces SSE3 instruction set support for advanced multimedia processing, alongside optimizations for integrated cache hierarchies that enhance data access efficiency.^[16] These changes contribute to a low transistor count of approximately 26.2 million on a 30 mm² die fabricated at 90 nm, yielding high efficiency per area through techniques like power gating for idle core states that reduce leakage current.^[17]^[1]

Cache and Bus Specifications

The VIA C7 processor features a three-level cache hierarchy designed for efficient data access in low-power computing environments. The primary caches consist of separate 64 KiB instruction and 64 KiB data L1 caches, both organized as Harvard architecture with 4-way set associativity and 64-byte line sizes to support rapid instruction fetching and data operations. ^[18] The unified L2 cache provides 128 KiB of storage with 32-way set associativity, an exclusive policy to minimize redundancy between levels, and a 64-byte line size, operating at the full core clock speed for low-latency performance in embedded applications. ^[2] The processor interfaces with system memory via a front-side bus (FSB) that employs quad-pumped DDR signaling, achieving effective transfer rates of 400 MT/s for models clocked at 1.0–1.5 GHz or 800 MT/s for 1.8–2.0 GHz variants, with AGTL+ electrical signaling to ensure compatibility with VIA chipsets such as the VT8237 southbridge. ^[2] Memory support is limited to up to 2 GB of DDR2-533 or DDR2-667 SDRAM, contingent on the specific model and accompanying northbridge, as the C7 lacks an integrated memory controller and relies on external chipset components for address decoding and data transfer. ^[19] Interconnect features emphasize simplicity and efficiency for embedded systems, utilizing a source-synchronous FSB with multiplexed 36-bit physical addressing across a 20-bit bus to enable low-latency access without advanced protocols like HyperTransport or QuickPath Interconnect. ^[2] This configuration prioritizes compatibility with legacy x86 platforms while optimizing bandwidth for typical workloads in compact devices.

Features and Capabilities

Instruction Set Extensions

The VIA C7 processor maintains full backward compatibility with the x86-16 and IA-32 instruction sets, supporting all standard registers, addressing modes, and legacy instructions to ensure seamless execution of x86 software from earlier generations.^[2] It incorporates MMX instructions for accelerated integer multimedia operations, leveraging 64-bit MMX registers to handle packed data efficiently.^[2] The processor fully implements SSE and SSE2 extensions, utilizing 128-bit XMM registers for single-instruction multiple-data (SIMD) processing of floating-point and integer vectors, which enhances performance in multimedia and scientific computing tasks.^[2] SSE3 support extends this capability with additional instructions, including horizontal addition and subtraction operations such as PHADDD and PHADDW for efficient cross-lane arithmetic, as well as LDDQU for non-temporal loads that disable cache line eviction to optimize streaming data access.^[2] However, the VIA C7 does not support SSSE3 or any later SIMD extensions beyond SSE3.^[2] VIA-specific extensions include the PadLock instruction set, which provides dedicated opcodes for offloading cryptographic primitives like AES encryption and random number generation to hardware accelerators.^[20] For enhanced security, the processor implements the NX (No eXecute) bit via Physical Address Extension (PAE) mode, allowing operating systems to mark memory pages as non-executable to mitigate buffer overflow exploits.^[2] Power efficiency is supported through VIA PowerSaver technology, an implementation of dynamic frequency scaling akin to Intel's Enhanced SpeedStep, enabling the core to adjust clock frequency and voltage dynamically across multiple states for balanced performance and energy use in varying workloads.^[2] Overall, these extensions ensure the VIA C7 remains binary-compatible with broad x86 ecosystems while prioritizing optimizations for low-power scenarios, such as office applications and basic multimedia processing.^[2]

Security and Power Management

The VIA C7 processor integrates the PadLock security engine, a hardware-accelerated cryptographic suite designed to offload encryption tasks from the CPU core, thereby reducing overall system load and improving efficiency for security-intensive applications.^[1] This engine builds on prior generations by incorporating support for AES encryption in 128-bit, 192-bit, and 256-bit key lengths across all standard modes, including ECB, CBC, CFB, OFB, and CTR, enabling high-speed symmetric cryptography without software intervention.^[21] Additionally, it provides hardware acceleration for SHA-1 and SHA-256 hashing algorithms, allowing for rapid computation of message digests essential in digital signatures and data integrity verification.^[1] The engine also includes a hardware random number generator capable of producing up to approximately 80 Mb/s (whitened) on 1.6 GHz models.^[20] For asymmetric cryptography, the PadLock includes a Montgomery multiplier that accelerates RSA operations, supporting key sizes up to 32,768 bits and achieving performance levels such as approximately 18 RSA signings per second for 4096-bit keys.^[22]^[20] Power management in the VIA C7 emphasizes ultra-low consumption through the proprietary VIA PowerSaver technology, which implements multiple power states including Normal (active), QuickStart, Sleep, Deep Sleep, and Deeper Sleep, along with techniques like clock gating and dynamic voltage scaling to minimize energy use during varying workloads.^[9] The processor's thermal design power (TDP) is capped at 20 W for standard 2 GHz models, enabling fanless operation in embedded and mobile systems while maintaining thermal stability.^[23] Ultra-low voltage (ULV) variants further reduce power draw to 1-5 W, with idle consumption as low as 0.1 W and average usage under 1 W during light loads, supporting extended battery life in portable devices.^[24] Dynamic voltage and frequency scaling is enhanced by Twin Turbo technology, which employs dual phase-locked loops (PLLs)—one for high-performance operation and another for low-power modes—to adapt clock speeds seamlessly to workload demands, optimizing both efficiency and responsiveness.^[25] The C7-D variants incorporate RoHS compliance, eliminating hazardous materials like lead to meet environmental standards while preserving the core power and security features of the family.^[26] This combination of hardware cryptography and advanced power controls positions the VIA C7 as a foundational processor for secure, energy-efficient computing in constrained environments.

Applications and Impact

Commercial Deployments

The VIA C7 processor found significant adoption in consumer netbooks during the late 2000s, particularly through partnerships with major OEMs targeting the emerging market for ultra-portable devices. One prominent example was the HP 2133 Mini-Note PC, released in 2008, which integrated the low-power VIA C7-M ULV processor operating at speeds of 1.0 GHz, 1.2 GHz, or 1.6 GHz, paired with the VIA Chrome 9 integrated graphics for basic multimedia tasks. This device, aimed at students and mobile users, featured a compact 8.9-inch display and SSD storage options starting at 4 GB, emphasizing portability and extended battery life in a sub-$600 price range.^[27]^[28] Beyond consumer laptops, the VIA C7 powered various embedded systems and thin clients, capitalizing on its efficiency for fanless designs in industrial and commercial environments. VIA's EPIA motherboard series, incorporating the 1.0 GHz VIA C7 processor, supported applications such as digital signage and silent servers, where thermal management was critical. Thin client solutions from vendors like Wyse utilized the VIA C7 at 1.0 GHz with configurations including 1 GB RAM and flash storage, enabling remote desktop access in office and enterprise settings. These deployments extended to specialized industrial PCs, such as the AMOS-3001, designed for harsh environments like digital signage kiosks and process control systems.^[1]^[29]^[30] The processor's commercial footprint was concentrated in pre-2010 netbooks and ultra-portables, with strong uptake in Asia-Pacific markets through OEM integrations by HP and similar partners, though specific shipment volumes for VIA C7-based systems remain undisclosed in public records. Its role in these segments highlighted VIA's focus on low-power x86 solutions for emerging portable computing, before the shift to Intel Atom dominance.^[27]

Performance Legacy and Comparisons

The VIA C7 processor delivered modest performance in benchmarks from its era, reflecting its in-order execution design and focus on low-power embedded applications. In PassMark CPU Mark tests, the 1.8 GHz VIA C7-D model scored 210, roughly half the score of the similarly clocked Intel Pentium M 1.8 GHz (424) and about a quarter of the Intel Core 2 Duo T5200 at 1.6 GHz (840), highlighting its lower instructions per clock (IPC) in single-threaded workloads compared to out-of-order contemporaries.^[31]^[32]^[33] Power efficiency was a key strength, particularly in idle states, where VIA C7-based platforms consumed around 49 W compared to 59 W for early Intel Atom systems, though under sustained loads the C7's power draw increased by 10 W versus the Atom's 3 W rise, resulting in mixed performance-per-watt outcomes. In 2006-2008 platform evaluations, the C7 offered 1-2x better efficiency than prior Atom generations in light tasks but trailed in multi-threaded scenarios due to lacking hyper-threading support.^[34] Relative to competitors, the C7 matched the Pentium M's power envelope (around 20-25 W TDP) while being notably cheaper, with motherboards costing roughly half as much, making it attractive for budget embedded systems.^[23] Against the AMD Geode, the C7 provided superior full x86 compatibility without the Geode's occasional instruction set limitations in early models, though the Geode edged out in raw speed for specific low-end tasks.^[35] As a transitional design, the C7 paved the way for VIA's Nano successor in 2008, which delivered 2-4x the performance at similar power levels, marking the C7's fade from mainstream use by the early 2010s.^[36] Following the Nano's introduction in 2008, the C7 transitioned to legacy status, with official driver and BIOS support limited after that period, restricting compatibility to older operating systems like Windows 7 and certain Linux distributions as of 2025. As of 2025, the C7 remains viable for retro computing enthusiasts and select legacy embedded systems running older Linux distributions, though modern OS support is absent, confining its role to retro computing and niche embedded applications.^[37]^[38]

References

[1]
VIA Launches VIA C7 Processor - VIA Technologies, Inc.
May 27, 2005 · Ultra low power, ultra secure, and ultra small VIA C7 processor packs a powerful punch for thin & light notebooks, mini PCs, ...
[2]
[PDF] VIA C7 in nanoBGA2 Datasheet - The CPU Shack
The VIA C7 processor supports SSE, SSE2, and SSE3 instructions for better video, audio, and faster 3D graphics. Other functions are provided and are identified ...
[3]
C7-D Desktop Processor - VIA Gallery -
Dec 24, 2016 · The VIA C7-D processor is the ideal desktop processor choice for corporations and individuals seeking to significantly save on their power bills ...
[4]
Via buys Centaur in second x86 move - Electronics Weekly
Aug 11, 1999 · Via buys Centaur in second x86 move Richard Ball Taiwanese chipset manufacturer VIA Technologies has bought Centaur, the x86 processor designMissing: acquires | Show results with:acquires
[5]
Via buys Centaur from IDT, adds to X86 arsenal - EE Times
The cross licensing agreement will allow IDT to continue to use the Centaur patents being acquired by 12-year-old Via Technologies. The cross license ...
[6]
VIA C7/C7-M Processors - iXBT Labs
... evolutionary step from Nehemiah core, like Yonah is an evolutionary step from Dothan. It is a direct analogy: Family Number remained the same (6), while ...
[7]
VIA's 90nm CPU to be branded C7 - The Register
Sep 16, 2004 · The C7 is expected to consume 3.5W at 1GHz, but be capable of being clocked to 2GHz and beyond. The C7 will operate using an 800MHz frontside ...Missing: goals | Show results with:goals
[8]
VIA to ship C7 next month • The Register
Fabbed at 90nm by IBM, the C7's die is 30mm². Inside is 128KB of L1 cache and 128KB of L2, up from the C3's 64KB cache. The chip operates on an 800MHz frontside ...
[9]
VIA C7-M Mobile Processor Unveiled at Computex and VTF2005
Jun 1, 2005 · Taipei, Taiwan, 1 June 2005 – VIA Technologies, Inc, a leading innovator and developer of silicon chip technologies and PC platform solutions, ...Missing: development | Show results with:development
[10]
VIA Launches VIA Nano Processor Family | TechPowerUp
May 29, 2008 · End of an Era: Windows 10 Officially Reaches End of Life (99); AMD ... VIA C7 processor family and the first generation of VIA Nano processors.
[11]
VIA C7-D microprocessor - CPU-World
VIA C7-D is a desktop version of C7 microprocessor family. The C7-D CPUs have slightly higher Thermal Design Power that C7-M microprocessors (desktop C7 1.8 ...
[12]
VIA Eden - Wikipedia
VIA Eden is a variant of VIA's C3/C7 x86 processors, designed to be used in embedded devices. They have smaller package sizes, lower power consumption, ...Missing: M | Show results with:M
[13]
x86 cpus' Guide - VIA C7 - Models
Jan 25, 2021 · The C7 models range between 1 and 2 GHz. Up to 1.5GHz, the bus is working at 4x100MHz, beyond that, we go directly to a 4x200MHz bus.
[14]
Via C7 - Hardware Collection - Du 8086 aux Core i7 !
Jan 23, 2021 · The C7s went a step beyond compared to the C3, with HW support for SHA-1 and SHA-256 algorithms encoding and a Montgomery multiplier.
[15]
Via launches C7 “Esther” processor - Ars Technica
May 27, 2005 · Like its predecessors, the C7 is primarily about low power and small die size. But VIA is also aiming to close some of the performance gap ...Missing: samples | Show results with:samples
[16]
Isaiah revealed: VIA's new low-power architecture - Ars Technica
Jan 23, 2008 · With its in-order design built on an aging but inexpensive 90nm process technology, the VIA C7 (codenamed Esther) and its predecessors have ...
[17]
VIA Announces World's First Carbon Free Processor
Sep 13, 2006 · The VIA C7-D processor is based on the advanced VIA CoolStream™ architecture of the 'Esther' core ... pipeline stages, support for SSE2 and ...
[18]
x86 cpus' Guide - View details on VIA C7-M 765 PGA
Manufacturer, VIA. Model, C7. Architecture, x86. Codename, Esther. Core frequency, 1.6 GHz. Targeted market, Laptop PCs.Missing: motivations | Show results with:motivations
[19]
45359 – poor -march=native choices for VIA C7 Esther processors
May 17, 2013 · ... L2 cache sizes as --params which does not happen for the VIA C7. ... lines per tag, line size=64 bytes. L1 Data cache: 64KB 4-way ...<|control11|><|separator|>
[20]
[PDF] CN700 + VT8237R Plus - The Retro Web
Feb 20, 2012 · The CN700 features a robust shared memory architecture and support for up to 2 GB of high bandwidth DDR2. 533 or DDR400 memory, as well as a ...Missing: VT8237 | Show results with:VT8237
[21]
x86 Options (Using the GNU Compiler Collection (GCC))
(No scheduling is implemented for this chip.) ' c7 '. VIA C7 (Esther) CPU with MMX, SSE, SSE2 and SSE3 instruction set support. (No scheduling is implemented ...
[22]
[PDF] VIA PadLock Programming Guide - kib.kiev.ua
Aug 4, 2005 · During execution of a PadLock instruction, any number of exceptions or interrupts may occur. For most exceptions, microcode instructions appear, ...
[23]
VIA C7-M Processor Preview - PCSTATS.com
Aug 9, 2005 · The padlock supports all AES modes through the Padlock ACE (Advanced Cryptography Engine). This ability allows the C7-M processor to offload AES ...
[24]
[PDF] VIA PadLock Security Engine - ManualLib.com
Aug 8, 2005 · Using a Montgomery Multiplier, VIA PadLock accelerates all forms of public key encryption including RSA algorithms. This accelerator allows ...<|separator|>
[25]
All you need to know about VIA's C7 | [H]ard|Forum
Jan 16, 2006 · The New VIA processors are built to run cool and on low power. At idle, the 2GHz C7 runs at 0.1W and 20W under full load.
[26]
Tiny Via ULV mobile processor targets UMPCs - LinuxDevices
Mar 10, 2006 · Idle power requirements are as low as 100mW (0.1 Watts) for some C7-M ULV models, it says. The C7-M ULV uses less power than similar Intel ...
[27]
VIA C7-M Power Saving Features - PCSTATS
Aug 9, 2005 · PowerSaver is VIA's nomenclature for its dynamic underclocking technology. The VIA C7-M uses PowerSaver to reduce processor speed on the fly ...
[28]
Chip maker announces 'carbon-free' processor | CBC News
Sep 13, 2006 · The C7-D has no cooling fans to dissipate heat generated from the chip. ... The chip is also compliant with the European Union's RoHS directive ...
[29]
VIA C7-M ULV Processor Powers New HP 2133 Mini-Note PC
Apr 8, 2008 · The low power VIA C7®-M ULV processor will be used to power the new HP 2133 Mini-Note PC, a sleek and stylish, small form factor notebook.Missing: motivations compatibility
[30]
HP 2133 Mini-Note Review - Laptop Mag
Rating 4.0 Apr 7, 2008 · These latter configurations start at $599. System Performance. The system is powered by a 1.6-GHz VIA C7-M processor, VIA Chrome 9 graphics chip ...
[31]
Wyse Thin Client VIA C7 1.0GHz 1GB 902166-01L - Newegg Business
3–5 day delivery 15-day returnsFeatures, Software Included: - Microsoft Internet Explorer 7.0 - RDP 6.0.xx resident - Citrix ICA 11 resident - Active X Sun JRE - Media Player
[32]
AMOS-3001: An Industrial PC for Digital Signage, Thin Clients?
Jan 14, 2010 · VIA is releasing a new offering called the AMOS-3001. Is it an industrial PC, or is it more? It's designed to take a beating in extreme temperatures.
[33]
VIA C7-D 1800MHz Benchmark
### Summary of VIA C7-D 1800MHz Benchmark Data
[34]
Intel Pentium M 1.80GHz Benchmark
### Summary of Intel Pentium M 1.80GHz
[35]
Intel Core2 Duo T5200 Benchmark
**Summary of Intel Core2 Duo T5200 @ 1.60GHz:**
[36]
Intel Atom vs. VIA C7: Which Makes a Faster, Cheaper NAS?
I don't think I'm going to declare a clear winner here between the VIA C7 and Intel Atom. It looks that they are pretty evenly matched for performance and ...
[37]
Via C7 Processor | AnandTech Forums
Apr 27, 2006 · In fact, VIA demonstrated a C7-M processor performing DVD decoding with no CPU heat sink at all at a presentation at the 2005 VIA Technology ...<|separator|>
[38]
Via finally releases new Nano processor | ZDNET
May 29, 2008 · The Nano will deliver two to three times the performance of the current C7 with roughly the same power requirements, according to the company.Missing: successor | Show results with:successor<|control11|><|separator|>
[39]
VIA Launches VIA Nano Processor Family - VIA Technologies, Inc.
May 29, 2008 · ... VIA C7 processors will ensure a smooth transition for OEMs and ... L2 cache with 16-way associativity gives a big boost to multimedia performance.
[40]
Which Linux will work with a Via c7 m processor? In 2024? - Reddit
Apr 2, 2024 · I think the C7 has the CMOV instruction so most 32-bit distros should run. Can probably get Xorg running with the OpenChrome driver, but there won't be any ...Got a Wyse C90LE7 (VIA C7 1 GHz, 2 GB RAM, 4 GB IDE ... - RedditWill any distro work with a VIA C7-M Processor? : r/linuxquestionsMore results from www.reddit.com<|control11|><|separator|>