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Ampere Computing

Ampere Computing is a fabless specializing in the design of high-performance, energy-efficient Arm-based processors optimized for cloud native applications, AI inference, , and hyperscale data centers. Founded in 2018 by industry veteran , who serves as its chairman and CEO, the is headquartered in , with operations across nine global locations including , , , , , , , and . Ampere's processors emphasize by addressing power constraints in modern computing environments, delivering consistent performance per core while minimizing energy consumption for workloads such as web services, media encoding, databases, and inference. The company's flagship products include the Ampere Altra family, which offers up to 128 cores at frequencies reaching 3.0 GHz, and the more advanced AmpereOne family, providing up to 192 cores with enhanced capabilities and efficiency improvements over previous generations. These cloud-native processors are built on architecture and are deployed in platforms from partners like and others, powering scalable infrastructure for major cloud providers and enterprises seeking to reduce operational costs and carbon footprints. Ampere has grown rapidly, employing over 1,400 people and earning recognition as one of Fast Company's 100 Best Workplaces for Innovators in for its innovative approach to CPU design. In March 2025, announced its intent to acquire for $6.5 billion in cash, positioning the company as a to accelerate Arm-based innovations in and , with the deal, cleared by the U.S. in November 2025, expected to close in the latter half of 2025 pending any remaining regulatory approvals. This move underscores 's role in the evolving landscape of sustainable, high-density computing amid rising demands for energy-efficient solutions.

Overview

Founding and leadership

Ampere Computing was founded on September 27, 2017, by , a veteran and former President of Corporation, with initial funding provided by . The Carlyle Group facilitated the company's establishment by acquiring the X-Gene , assets, and engineering team from AppliedMicro (later known as ), enabling Ampere to build upon existing ARM-based server processor technology. Renée James has served as Ampere's CEO and Chairwoman since its inception, leveraging her over two decades of experience at , where she rose to in 2013 and oversaw global operations, strategy, and key partnerships before departing in 2016. Under her leadership, the executive team includes key figures such as Todd Underwood, , who brings expertise in from prior roles in and sectors; Atiq Bajwa, Chief Technology Officer and Chief Architect, a veteran in design with extensive experience in ; and Rohit Vidwans, , responsible for scaling production and operations drawing from his background in chip fabrication. This team reflects a blend of industry expertise focused on innovation in . The company established its initial headquarters in , in the heart of , to centralize research, development, and administrative functions. By 2023, Ampere had expanded globally to nine locations, including sites in , and international offices to support engineering, sales, and operations. From its outset, Ampere's vision centered on developing high-core-count -based CPUs optimized for cloud-native workloads, aiming to deliver energy-efficient, scalable computing solutions for data centers. Drawing briefly from James's x86 background at , the company pivoted to ARM architecture to meet the demands of hyperscale cloud environments.

Business focus and mission

Ampere Computing operates as a fabless semiconductor company specializing in the design of ARM-based server central processing units (CPUs) optimized for hyperscale data centers, , applications, and inference workloads. The company's processors are engineered to address the demands of modern data-intensive environments, prioritizing scalability and reliability in distributed systems. The mission of Ampere Computing is encapsulated in its commitment to delivering alongside sustainability amid growing constraints: "In a world with increasing constraints, we continue to find ways to deliver and sustainability. This is the mission of Ampere." This focus manifests in an emphasis on high core counts—reaching up to 192 cores in its AmpereOne family and beyond in future designs—coupled with exceptional efficiency that reduces for infrastructures and tasks. Additionally, Ampere's cloud-native principles ensure consistent across virtual instances, enabling seamless scaling for applications like web services and inference without variability in output. Ampere's business model revolves around designing innovative CPU architectures and partnering with leading foundries such as for manufacturing, allowing the company to leverage advanced process nodes like 5nm and 3nm without owning fabrication facilities. Revenue is generated primarily through the sale of these processors to original equipment manufacturers (OEMs) and system integrators, as well as through strategic collaborations for custom chip designs that support integration in partner ecosystems. As of 2025, Ampere targets key markets including cloud service providers (CSPs) for scalable infrastructure, (HPC) for scientific simulations, and workloads for efficient at scale.

History

Inception and early development (2017–2019)

Ampere Computing was established in the fall of 2017 by , former president of , with initial funding from to develop high-performance -based processors for and applications. The company was formed through the acquisition of the CPU division from , which had previously purchased AppliedMicro in early 2017, securing the X-Gene server IP portfolio and integrating approximately 300 engineers from the team. This acquisition provided Ampere with established v8 architectural expertise and a foundation for custom core designs tailored to workloads, distinguishing it from off-the-shelf Neoverse implementations by emphasizing energy-efficient, high-core-count architectures. Early research and development efforts centered on advancing custom cores optimized for scalable , leveraging the inherited X-Gene technology while navigating shifts in the ARM ecosystem following SoftBank's 2016 acquisition of and the introduction of Neoverse platforms in 2018. Ampere established key design centers in —building on AppliedMicro's legacy presence—and , , to support silicon design, verification, and applications engineering. These facilities enabled rapid iteration amid intense competition from Intel's x86 dominance and AMD's advancements in the server market. In April 2019, secured additional funding in a round led by , with participation from new investor (a SoftBank subsidiary), to accelerate R&D and scale operations; the investment amount was not publicly disclosed at the time. These formative steps under James's leadership positioned Ampere to challenge established players by focusing on sustainable, high-density computing solutions for hyperscale environments.

Product launches and growth (2020–2023)

In 2020, Ampere Computing launched its flagship Ampere Altra processor, marking the introduction of the industry's first 80-core ARM-based server CPU designed specifically for cloud-native workloads. The Altra began sampling to partners in early 2020, with production ramping up by mid-year, enabling initial deployments in hyperscale data centers focused on high-density, energy-efficient computing. This launch built briefly on IP acquired from , allowing Ampere to accelerate its entry into the server processor market. By 2021, Ampere expanded its portfolio with the release of the Ampere Altra Max, featuring 128 cores and enhanced scalability for large-scale cloud environments. The Altra Max became available for sampling in late 2020 and entered full production in 2021, supporting up to 60% more cores than its predecessor while maintaining compatibility with existing Altra ecosystems. Partnerships with cloud providers gained momentum during this period, including collaborations with and UCloud, which demonstrated superior performance in applications like web serving and simulations on Altra platforms. Ecosystem development advanced through support from major operating systems, such as and , ensuring broad compatibility for enterprise deployments. In 2022, ramped up production of its Altra family processors, driving adoption among system integrators like , , and to deliver cost-effective cloud infrastructure. The company secured a significant convertible note investment from in April, alongside a $128 million secondary market transaction, bolstering its growth amid preparations for an that valued the firm at approximately $8 billion. These funds supported expanded operations, with employee numbers growing from around 200 in 2020 to over 500 by late 2022, reflecting increased R&D and sales efforts. Revenue reached about $152 million for the year, up substantially from prior years as deployments scaled in cloud environments. Ampere's collaboration with deepened in , culminating in the announcement of the AmpereOne processor family on May 18, featuring up to 192 custom-designed cores optimized for single-threaded performance and DDR5 memory support. This marked Ampere's entry into the inference market, with AmpereOne targeted at high-performance workloads in digital services, including -driven applications requiring efficient, scalable compute. Despite market challenges, the company maintained growth momentum, with revenue estimated at $47 million for amid ongoing ecosystem expansions and preparations for broader AmpereOne availability. Employee headcount exceeded 500, supporting intensified focus on and cloud-native innovations.

Recent milestones and acquisition (2024–2025)

In 2024, Ampere Computing began shipping its AmpereOne processors, marking a significant advancement in high-core-count Arm-based CPUs designed for and workloads. In May 2024, Ampere updated its product roadmap, announcing a forthcoming 256-core CPU based on TSMC's 3nm process node, slated for release in 2025, which promised up to 40% higher performance compared to existing market-leading processors, and a joint effort with to integrate Ampere's CPUs with Qualcomm's Cloud accelerators to optimize for large-scale models. Later that year, in December, the company introduced the AmpereOne M variant, featuring 192 cores and 12-channel DDR5 memory support to enhance bandwidth for memory-intensive applications. A pivotal event occurred on March 19, 2025, when announced its intent to acquire Ampere Computing for $6.5 billion in an all-cash deal, representing a premium valuation for the company. The acquisition, expected to close in late 2025, aims to strengthen 's control over the ecosystem by integrating Ampere's expertise in energy-efficient server processors; on November 17, 2025, the U.S. concluded its review and cleared the deal. This underscores Ampere's established position among hyperscalers and cloud providers. Throughout 2025, Ampere achieved additional milestones, including the launch of the Ampere Systems Builders Program in May, which collaborates with industry partners to develop modular, standards-based platforms for and infrastructure.

Products

Ampere Altra family

The Ampere Altra family comprises the company's inaugural lineup of cloud-native processors, introduced to deliver scalable, energy-efficient performance for hyperscale data centers and edge deployments. Launched in March 2020, these processors are built on the N1 core architecture and manufactured using TSMC's node, emphasizing single-threaded cores without turbo boosting for predictable operation across workloads. The family supports up to 128 PCIe Gen4 lanes for high-bandwidth I/O and 8 channels of DDR4-3200 memory with , enabling configurations up to 4 TB total capacity per socket. Optimized for services and cloud virtual machines, the Altra processors prioritize integer throughput and multi-core scaling to handle dense, power-constrained environments efficiently. The flagship Ampere Altra processor features up to 80 Armv8.2+ 64-bit running at a maximum of 3.3 GHz, with each equipped with 64 KB L1 instruction and data caches alongside 1 MB of private L2 cache. Supporting a (TDP) range from 45 W to 250 W, it delivers up to 301 SPECrate2017_int_base performance, showcasing strong integer processing for cloud-native applications. In June 2020, Ampere announced the Altra Max variant, which extends the design to 128 at up to 3.0 GHz while retaining the same , memory subsystem, and I/O capabilities, but targeting higher-density configurations within the 250 W TDP envelope for enhanced rack-level efficiency. The Neoverse N1 provide an estimated 2.3x performance uplift over prior-generation Arm server designs, enabling up to 2.4x better SPECint results compared to contemporary processors in multi-threaded scenarios. Available in core counts from 32 to 128, the Altra family includes variants like the 64-core Q64-30 model, which balances performance and power for mid-range servers, and lower-core options such as 32-core SKUs suited for applications with reduced thermal demands. These configurations support dual-socket systems for up to 256 cores, facilitating energy-efficient dense racks in web-scale . Early adoption highlighted their suitability for , where low power draw and high core density enable efficient handling of network functions and virtualized services. Building on the company's prior X-Gene foundations, the Altra family shifts to a fully custom Neoverse-based design for modern cloud demands.

AmpereOne family

The AmpereOne family represents Computing's second-generation processor lineup, introduced in 2023 as a high-core-count solution optimized for cloud-native and workloads. Featuring up to 192 custom-designed cores compliant with the Armv8.6+ , these processors diverge from the Neoverse-based designs of prior generations by incorporating proprietary core for enhanced single-threaded performance and efficiency. Fabricated on TSMC's 5nm process node, the AmpereOne employs a chiplet-based design with a 5964-pin FCLGA , enabling scalability in dense server environments. Key specifications include clock speeds reaching up to 3.6 GHz, 2 MB of private cache per core, and a 64 MB system-level , supporting up to 8 channels of DDR5-5200 for a maximum capacity of 4 TB per socket. The processors integrate 128 lanes of PCIe 5.0 for high-bandwidth I/O connectivity and offer configurable (TDP) ranging from 194 W to 350 W, balancing performance with power efficiency in multi-socket configurations. Built-in processing units (2x128-bit per core) supporting FP16, BF16, INT8, and INT16 types enable efficient inference tasks, such as large language model processing, without dedicated accelerators. This design scales core density beyond the Altra family while maintaining consistent low-latency execution for parallel workloads. In 2024, Ampere introduced the AmpereOne M variant, enhancing the family with 12 channels of DDR5-5600 to deliver higher bandwidth for memory-intensive applications in (HPC) and . Retaining the 192-core and up to 3.6 GHz frequencies, the M series supports up to 1.5 TB of addressable per socket and TDP options from 250 W to 425 W, targeting generative AI inference and object caching scenarios. This upgrade addresses bandwidth bottlenecks in AI workloads, providing up to 50% more memory throughput compared to the standard 8-channel . Performance evaluations highlight the AmpereOne family's strengths in multi-threaded environments, with approximately double the performance per compared to the Altra Max series due to doubled L2 cache and architectural optimizations. In video benchmarks using encoding, the 192- AmpereOne A192-32X achieves up to 35% better frames per joule than competing x86 platforms, demonstrating superior for cloud-scale media processing. These gains stem from the processors' focus on predictable, single-threaded execution, reducing variability in latency-sensitive tasks. Production of the AmpereOne began shipping in late , with volume availability ramping in 2024 for integration into server platforms. The AmpereOne M followed in Q4 2024, with systems from partners like Giga Computing incorporating the processors into 2U rackmount designs for and deployments, such as the R1A3-T40 series supporting up to 192 cores and 12-channel . These integrations emphasize the family's role in powering efficient, scalable infrastructure.

Future processors and roadmap

Ampere Computing has outlined plans for a next-generation in its AmpereOne family, featuring up to 256 cores fabricated on TSMC's 3nm (N3) process node, scheduled for release in 2025. This design incorporates a new core architecture to enable higher core density within a configuration, while maintaining compatibility with existing air-cooled thermal solutions used in prior AmpereOne variants. The will support 12 channels of DDR5 memory and PCIe 6.0 interfaces, targeting enhanced for data-intensive workloads. Officials project this CPU to deliver over 40% greater overall performance compared to leading competitors on the market at the time of announcement, with a focus on improving for sustainable scaling in data centers. Building on the custom of the current AmpereOne family, Ampere's broader envisions four generations of Arm-based processors extending through 2027, with increasing emphasis on integration for and (HPC) applications. This includes advancements in core efficiency, interconnect fabrics, and compatibility to address growing demands in and inference-heavy environments. A key element of this strategy involves a joint development effort with Technologies, announced in 2024, to create integrated CPU-plus- platforms leveraging Ampere's processors alongside Qualcomm's AI accelerators for optimized AI inferencing at scale. Post the March 2025 announcement of its acquisition by SoftBank Group for $6.5 billion—expected to close by the end of 2025—Ampere has set ambitious strategic goals, including capturing over 50% of the Arm server CPU market by 2027 through accelerated innovation and expanded ecosystem partnerships. On November 17, 2025, the U.S. Federal Trade Commission approved the acquisition, clearing the final major regulatory hurdle. This target aligns with broader industry projections for Arm architectures to dominate data center compute, driven by energy efficiency advantages in AI and HPC deployments. However, the integration with SoftBank, which also holds a majority stake in Arm Holdings, may introduce shifts in development priorities and operational synergies.

Technology

Processor architecture

Ampere Computing's processor architecture is built on the ARMv8 instruction set architecture (ISA), emphasizing high core counts and consistent performance for cloud-native workloads. The company's initial products, such as the Ampere Altra family, utilize semi-custom implementations of Arm's Neoverse N1 core, which is based on the ARMv8.2+ ISA. This design incorporates modifications by Ampere to enhance scalability and efficiency in multi-core environments. Drawing briefly from the founder's experience at in multi-core scaling, Ampere focused on uniform core performance without relying on frequency boosts, ensuring predictable latency across all cores. With the AmpereOne family, shifted to a fully core design compliant with the ARMv8.6+ , featuring advanced branch prediction mechanisms and dual 128-bit vector units per that natively support formats like FP16, BFloat16, INT8, and INT16 for accelerated processing in and general compute tasks. This core enables higher integration and customization compared to off-the-shelf . Key architectural features include a chiplet-like with a custom mesh interconnect, allowing scalable core counts while maintaining low-latency communication between dies. The architecture also incorporates datacenter-class () features, such as SECDED error-correcting code () for caches and , along with symbol-based for enhanced . Support for is provided through single-key , protecting data in use against unauthorized access. The instruction set encompasses the full (ARM64) execution state, with extensions from ARMv8.5 and later for , including for (RNG, ARMv8.5), SHA-512 (ARMv8.2), and (ARMv8.6) hashing to bolster security workloads. While scalable vector extensions (SVE) are part of the broader ARM , Ampere's implementations prioritize NEON SIMD for vector processing, ensuring with ARMv8 vector instructions. The software is optimized for native ARM64 environments, providing seamless support for distributions, container orchestration via , and through KVM , without emphasis on x86 . This focus on ARM-native execution differentiates Ampere's architecture from x86 competitors, which often employ and heterogeneous cores, by delivering uniform, high-throughput performance across all cores for sustained parallel workloads.

Manufacturing and key innovations

Ampere Computing operates a fabless semiconductor model, outsourcing the fabrication of its processors primarily to Taiwan Semiconductor Manufacturing Company (TSMC). The AmpereOne family is produced using TSMC's 5nm process node, enabling high core counts and improved power efficiency for cloud workloads. Future generations, such as the 256-core AmpereOne variant on TSMC's 3nm process, with production beginning in 2025 and expected availability in late 2025 or 2026, will further enhance performance density and energy optimization. A core innovation in Ampere's design philosophy is its cloud-native architecture, which ensures consistent performance per watt across varying socket configurations by employing single-threaded cores that scale predictably without the inconsistencies of multi-threaded x86 designs. This approach is complemented by dynamic voltage scaling technologies, including Adaptive Voltage Scaling (AVS) and Dynamic Voltage Frequency Scaling (DVFS), which allow real-time adjustments to power delivery in constrained environments, optimizing efficiency for hyperscale data centers. In terms of efficiency, processors deliver up to 2.8 times lower power consumption compared to equivalent x86 systems in workloads, contributing to reduced (TCO) for hyperscalers through lower energy and cooling demands—potentially up to 40% TCO savings. These gains stem from the architecture's focus on high utilization and linear scaling, enabling denser deployments that minimize infrastructure overhead. Ampere collaborates closely with on intellectual property, licensing the Armv8.6+ to develop custom cores tailored for cloud-native applications, incorporating features like enhanced SIMD units for vector processing. Additionally, integrations with (CXL) standards, supported through the Arm ecosystem, facilitate memory pooling to enable composable infrastructure and efficient resource sharing in disaggregated setups. In July 2024, Ampere announced the AmpereOne , scaling to up to 512 cores with integrated AI acceleration, support for (HBM), and an advanced design using the custom Aurora mesh interconnect, aimed at AI and workloads. This builds on the AmpereOne and is expected to enter production in late 2025 or 2026. Ampere's designs prioritize by optimizing for reduced energy use and physical footprint, achieving 2-3 times savings in power and space compared to traditional x86 servers, which directly lowers the of data centers. This focus aligns with broader efforts to combat the environmental impact of AI and , emphasizing processors that support net-zero goals without compromising performance.

Customers and market impact

Major customers and deployments

Ampere Computing's processors have been widely adopted by major hyperscalers for cloud infrastructure. Oracle Cloud Infrastructure (OCI) extensively deploys Ampere-based compute shapes, including the A2 instances powered by Ampere Altra processors for general-purpose workloads such as databases and web services, and the newly announced A4 shapes utilizing AmpereOne M processors, which became generally available in late 2025 and offer up to 45% higher per-core performance for AI inference and cloud-native applications. Microsoft Azure has historically utilized Ampere Altra processors in its Arm-based virtual machines across multiple regions, supporting scalable cloud deployments, though it has transitioned toward custom Cobalt processors for newer instances by 2025. Beyond hyperscalers, serves key players in and . integrates Altra processors into its Metal bare metal platform, enabling high-density, energy-efficient deployments for edge applications in over 250 centers worldwide, including configurations with up to 80 cores per instance for low-latency workloads. In the sector, is expanding with partners like , which deployed processors in its virtualized RAN solutions for commercial trials starting in early 2025, focusing on sustainable, low-power infrastructure for Open RAN-compliant networks. Ampere's deployments span diverse use cases, including high-scale video streaming and (HPC). Providers at Netflix-scale leverage Ampere Altra processors for and streaming services, achieving high stream density—such as up to 320 or 100 1080p30 streams per server in optimized configurations with integrated video processing units. In HPC, Ampere powers university-led supercomputing initiatives, such as Stony Brook University's NSF-funded system with Ampere and integration, delivering sustainable cyberinfrastructure for scientific simulations and data analysis starting in 2025. Strategic partnerships with system builders enhance Ampere's ecosystem reach. Giga Computing released a portfolio of AmpereOne M-powered servers in 2025, optimized for dense and workloads with up to 192 cores, showcased at events like SuperComputing 2025 for hyperscale and edge integrations. (HPE) incorporates Ampere Altra and Altra Max processors into its RL300 Gen11 servers, providing up to 128 cores per socket for inference without GPUs and supporting enterprise-scale cloud-native environments. A notable case study is Oracle Red Bull Racing's use of OCI Ampere A2 and A4 compute shapes for Formula 1 simulations during the 2025 season, enabling a 12% performance boost in race strategy modeling and aerodynamic predictions through high-throughput, consistent core performance.

Market position and

Ampere Computing holds approximately 18.2% of the -based CPU in 2025, a slight decline from over 20% in prior years, primarily due to intensified competition from custom processors like and . This position establishes Ampere as a leading independent provider in the server segment, where it captured the highest global share at 27.4% among vendors as of early 2025, driven by deployments of its Altra and AmpereOne families. The company's growth is bolstered by its March 2025 acquisition by for $6.5 billion, which received U.S. approval on November 17, 2025, enhancing and integrating Ampere into a broader ecosystem including , enabling accelerated development and distribution, with the deal expected to close in late 2025. This move positions Ampere to challenge x86 dominance from Xeon and EPYC processors, particularly through its emphasis on AI inference workloads, where Ampere processors deliver up to 4x better performance than legacy x86 alternatives while prioritizing . Despite these advantages, faces challenges including the relative immaturity of the ecosystem compared to the established x86 software and tooling landscape, which can complicate migrations for enterprise applications. Additionally, its reliance on for advanced manufacturing exposes it to geopolitical risks, such as U.S.- trade tensions and potential supply disruptions in the semiconductor . Ampere's competitive strengths lie in its high core density—leading the industry with up to 128 cores per in the Altra Max—and low- design tailored for cloud-native applications, enabling consistent performance in scalable, parallel workloads like web services and . These features provide better under high-bandwidth loads than many rivals, supporting efficient resource utilization in hyperscale environments. Industry analysts project Ampere could expand its Arm cloud share toward 25% by 2027, fueled by rising demand for cost-effective, power-optimized computing amid growth. Ampere contributes significantly to the broader rise of architectures in s, where Arm-based systems like its processors can reduce overall power consumption by up to 15% compared to x86 equivalents, aiding efforts as global energy demands escalate. This impact supports Arm's ambition to capture 50% of the CPU market by late 2025, promoting industry-wide shifts toward lower-power, high-density .

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