SPICE
SPICE (Simulation Program with Integrated Circuit Emphasis) is a general-purpose, open-source analog electronic circuit simulator used by engineers to mathematically predict the behavior of electronic circuits in integrated circuit and board-level designs.[1] It performs nonlinear DC, nonlinear transient, and linear AC analyses on circuits comprising passive components like resistors, capacitors, and inductors, as well as active elements such as diodes, bipolar junction transistors (BJTs), and metal-oxide-semiconductor field-effect transistors (MOSFETs).[1] Originally developed at the University of California, Berkeley, SPICE has evolved into the foundational tool for verifying circuit integrity and optimizing performance prior to physical fabrication.[2] The origins of SPICE trace back to 1970, when it was created as a graduate student class project in the Department of Electrical Engineering and Computer Sciences (EECS) at UC Berkeley, under the supervision of Professor Donald O. Pederson.[2] Laurence W. Nagel, a PhD candidate at the time, led the development, building on earlier Berkeley simulators like CANCER (Circuit Analysis with Network Extended Routines), which had been initiated by Professor Ronald A. Rohrer in 1968.[3] The first version, SPICE1, incorporated advanced techniques such as sparse matrix methods for efficient computation and built-in models for semiconductor devices, making it accessible for academic and early industrial use.[2] Released into the public domain in 1972, its open-source nature allowed widespread adoption and spurred continuous enhancements by academia and industry.[3] Over the decades, SPICE has influenced the electronics industry profoundly, becoming the de facto standard for analog and mixed-signal circuit simulation and enabling the design of increasingly complex integrated circuits.[2] Its availability as open-source code facilitated the creation of numerous compatible implementations, including commercial variants like HSPICE from Synopsys for high-precision simulations and LTspice from Analog Devices, which offers schematic capture and waveform viewing enhancements.[4] Open-source derivatives such as ngspice provide robust support for mixed analog-digital circuits and integration with tools like KiCad.[5] These variants maintain compatibility with SPICE's netlist format while adding features like behavioral modeling and faster solvers for large-scale designs.[6] By the 1980s, SPICE had trained hundreds of engineers and contributed to U.S. leadership in microelectronics, remaining essential for modern semiconductor innovation despite advancements in digital and RF simulation tools.[2]History
Origins and Development
The development of SPICE began in the late 1960s at the University of California, Berkeley, driven by the need to simulate increasingly complex integrated circuits as transistor counts grew rapidly in semiconductor design.[7] In 1968, faculty member Ronald A. Rohrer introduced a course on computer analysis of nonlinear circuits, which laid the groundwork for advanced simulation tools to address the limitations of manual analysis and early linear approximation methods.[8] Donald O. Pederson, a professor in the Department of Electrical Engineering and Computer Sciences, oversaw the project as thesis advisor, with graduate student Laurence W. Nagel leading the implementation efforts after Rohrer's departure from Berkeley. The original name, Simulation Program with Integrated Circuit Emphasis (SPICE), reflected its focus on modeling integrated circuits, particularly emphasizing nonlinear device behaviors that earlier tools could not accurately capture.[9] Key motivations included the demand for precise nonlinear DC, transient, and small-signal analyses to go beyond the linear approximations employed in predecessors like IBM's ECAP and ECAP-II, which were insufficient for the nonlinear characteristics of diodes and transistors in modern ICs.[8] The program built on foundational semiconductor physics, incorporating Shockley diode equations and early transistor models such as the Ebers-Moll equations for bipolar junction transistors.[9] Early funding came from the National Science Foundation (NSF), supporting the academic research environment at Berkeley that enabled this innovation.[7] The project evolved from an initial program called CANCER (Computer Analysis of Nonlinear Circuits, Excluding Radiation), building on even earlier Berkeley tools like BIAS, SLIC, and TIME, and developed as a class project and publicly described in a 1971 paper by Nagel and Rohrer.[10] This precursor was released for limited use in 1971, with the first version of SPICE (SPICE1) released to limited users in fall 1971 and publicly introduced in April 1973, marking a significant milestone in accessible circuit simulation. By 1973, Nagel and Pederson formalized SPICE in a technical report, establishing it as a robust tool for integrated circuit design.[9][11]Initial Implementations and Milestones
The initial implementation of SPICE, known as SPICE1, was publicly released in 1973 by Laurence W. Nagel and Donald O. Pederson at the University of California, Berkeley. Written in Fortran, it emphasized simulation of integrated circuits through nodal analysis and supported DC operating point analysis, transient analysis, and small-signal AC analysis, with models for both MOS and bipolar transistors.[12] This version was designed to handle circuits up to 50 nodes and 25 bipolar transistors, using a fixed timestep for transient simulations on mainframe computers like the CDC 6400.[13] SPICE2, released in 1975 as part of Nagel's PhD dissertation and further developed until 1977 under the leadership of Pederson and contributions from researchers like A. Richard Newton and Sally Liu, introduced significant enhancements to address limitations in SPICE1. Key improvements included better convergence algorithms for nonlinear solvers, the addition of sensitivity analysis to evaluate circuit parameter variations, and support for behavioral modeling via subcircuit definitions, enabling hierarchical circuit representation.[14] These features expanded its utility for more complex MOS and bipolar designs, while maintaining backward compatibility with SPICE1 input formats.[15] A pivotal milestone came with the release of SPICE2G.6 in 1983, which solidified its role as a semi-official standard for circuit simulation due to refined numerical stability and broader device modeling. This version saw rapid adoption in universities for educational purposes and in industry for integrated circuit verification, forming the foundation for many commercial simulators.[14] By 1980, Berkeley had distributed thousands of copies, influencing parallel developments such as IBM's ASTAP simulator, which adopted similar nodal analysis techniques but emphasized sparse tableau formulations for larger circuits.[16] SPICE implementations tackled key technical challenges in simulating stiff differential equations arising from circuit dynamics, particularly in transient analysis. SPICE2 incorporated Gear's method, a stiffly stable backward differentiation formula that improved integration accuracy and convergence for systems with widely varying time constants, outperforming explicit methods in handling nonlinear device behaviors. From its inception, SPICE benefited from UC Berkeley's policy of releasing the software into the public domain without licensing fees, encouraging widespread academic and industrial use and fostering an ecosystem of modifications and extensions. This open approach, championed by Pederson, ensured free distribution and modification rights, accelerating its integration into global engineering workflows.[17]Successors and Implementations
Open-Source Variants
Ngspice, initiated in 1993 as a fork of the Berkeley SPICE 3f.5 release, serves as a prominent open-source mixed-signal circuit simulator that incorporates extensions from the Cider1b1 and Xspice packages for enhanced device modeling and digital simulation capabilities.[18] It supports a wide range of analyses, including transient, AC, DC, and noise simulations, while enabling mixed analog-digital workflows through XSPICE code models for behavioral extensions. Active development continues, with the latest stable release, version 45.2, issued on September 6, 2025, featuring bug fixes and improved compatibility for Windows environments.[19] Additionally, ngspice provides Python bindings via its shared library interface, allowing seamless integration into Python-based workflows for automated simulations and data analysis through libraries like PySpice.[20][21] Developed by Sandia National Laboratories starting in the early 2000s, Xyce is a SPICE-compatible simulator optimized for parallel processing on high-performance computing clusters, enabling efficient handling of large-scale circuits with millions of devices.[22] Its architecture leverages distributed-memory parallelism to reduce simulation times for complex analog and mixed-signal designs, supporting standard SPICE netlists alongside advanced analyses like harmonic balance and sensitivity.[23] First released as open-source software under the GNU General Public License in 2013, Xyce remains actively maintained by Sandia, with ongoing enhancements for scalability in scientific and engineering applications.[24][25] Qucs-S, a variant of the original Quite Universal Circuit Simulator (Qucs) project from the early 2000s, integrates open-source SPICE engines such as ngspice and Xyce within a unified graphical user interface for schematic capture and simulation.[26] Launched in its stable form around 2017, it emphasizes RF and system-level simulations, including microstrip modeling, semiconductor device analysis, and ESD effects, while maintaining compatibility with SPICE netlists for hybrid workflows.[27] The tool's backend-agnostic design allows users to select simulation kernels dynamically, facilitating advanced features like Verilog-A model support when paired with compatible engines.[26] Post-2020 developments in these variants have focused on extensibility, with ngspice introducing Verilog-A support through the OSDI/OpenVAF interface starting in version 39 (2022), enabling compact device models for more accurate behavioral simulations via community-contributed compilers.[28] Community efforts have also explored machine learning integration with ngspice for model optimization, such as using neural networks to accelerate transient analysis and genetic algorithms for analog circuit sizing, as detailed in recent research frameworks.[29] These advancements, driven by open contributions on platforms like GitHub, enhance the tools' adaptability for modern design challenges. All major open-source SPICE variants—ngspice under the modified BSD license, Xyce under the GNU GPL, and Qucs-S under GPL-2.0—promote accessibility for academic, research, and hobbyist use by allowing free distribution, modification, and integration without proprietary restrictions.[30][24][27] This licensing model fosters widespread adoption and collaborative improvement, distinguishing them from commercial tools while enabling extensions for specialized applications.Commercial Derivatives
Commercial derivatives of SPICE have evolved into proprietary simulators tailored for professional electronic design automation (EDA) workflows, offering enhanced performance, integration with design tools, and specialized analyses for industry applications. These tools, developed by major EDA vendors, provide optimized algorithms, advanced device models, and user interfaces that support complex circuit verification in semiconductor and PCB design, often under licensing models that ensure reliability and support for enterprise users. LTspice, introduced by Linear Technology in the late 1990s and maintained by Analog Devices following the 2017 acquisition, is a freeware SPICE simulator featuring an integrated schematic editor for circuit capture and a waveform viewer for results analysis. It includes fast Monte Carlo analysis capabilities to evaluate component tolerances and variations, making it a staple for analog circuit design and prototyping among engineers. Recent updates, such as those in LTspice 24 released in 2024 with further model enhancements in late 2025, have improved simulation speed and consistency while supporting behavioral modeling sources for arbitrary voltage and current expressions.[4][31][32] PSpice, originating in the 1980s from MicroSim and now part of Cadence's OrCAD suite since 1999, excels in analog and mixed-signal simulation with advanced waveform viewing tools for detailed signal inspection and support for hierarchical design entry to manage large schematics efficiently. It integrates seamlessly with PCB layout environments like OrCAD PCB Designer and Allegro, enabling simulation-driven optimization from schematic to board-level verification. These features facilitate rapid iteration in power electronics and signal integrity analysis.[33][34] Spectre, developed by Cadence starting in the late 1980s, is a high-performance circuit simulator optimized for analog, RF, and mixed-signal (AMS) designs, with extensions like SpectreRF for radio-frequency analysis and Spectre AMS Designer for system-level verification. It natively supports Verilog-AMS for behavioral modeling of mixed-signal systems, allowing co-simulation of analog and digital blocks in complex SoCs. Widely adopted in RFIC and AMS SoC verification, it delivers scalable parallel processing for large-scale designs.[35][36] HSPICE from Synopsys emphasizes precision in simulating nanometer-scale circuits, leveraging foundry-qualified models for accurate characterization of transistors and interconnects at advanced process nodes like 45 nm and below. It includes robust statistical variation analysis through Monte Carlo and variability tools to assess process-induced mismatches and yield impacts in high-volume manufacturing. This makes it essential for custom IC design where timing and power accuracy are critical.[37][38][39] These commercial SPICE derivatives dominate the semiconductor EDA landscape, with Synopsys and Cadence holding significant market shares in simulation tools amid a global EDA market projected to reach USD 19.22 billion in 2025. Licensing models typically involve annual fees scaled to usage and support levels, supporting their role in professional workflows. Recent trends include cloud-based integrations, such as AWS-compatible deployments for scalable simulation by 2023, contrasting with open-source variants that prioritize accessibility over enterprise optimization.[40]Technical Architecture
Simulation Analyses
SPICE employs modified nodal analysis to formulate circuit equations based on Kirchhoff's laws and device characteristics, enabling the solution of large systems through sparse matrix techniques. This foundation supports multiple analysis types, each addressing specific aspects of circuit performance, such as steady-state operation, time-domain responses, and frequency-domain behaviors. The core solver uses iterative numerical methods to handle nonlinearity, with convergence ensured through specialized techniques. These analyses assume prior definition of device models, which provide the nonlinear relationships between voltages, currents, and charges. DC analysis in SPICE determines the steady-state operating point of a circuit by solving a system of nonlinear algebraic equations derived from the nodal formulation. The primary equation is \mathbf{G} \cdot \mathbf{V} = \mathbf{I}, where \mathbf{G} is the conductance matrix incorporating nonlinear device conductances, \mathbf{V} is the vector of node voltages, and \mathbf{I} is the vector of independent current sources. This system is solved iteratively using the Newton-Raphson method, which linearizes the nonlinear functions around the current estimate and updates the solution via \Delta \mathbf{V} = -\mathbf{J}^{-1} \mathbf{F}, where \mathbf{J} is the Jacobian matrix of partial derivatives and \mathbf{F} is the residual vector. The process continues until the residuals fall below specified tolerances, such as RELTOL for relative error.[41][42] Transient analysis simulates the time-domain evolution of circuit variables by integrating the differential equations arising from capacitive and inductive elements in the device models. SPICE discretizes time into steps and approximates derivatives using implicit integration methods, transforming the problem into a sequence of nonlinear algebraic equations solved at each step via Newton-Raphson iteration. The default trapezoidal method models the integral of a variable x(t) as \int_{t_n - h}^{t_n} x(t) \, dt \approx \frac{h}{2} (x(t_n) + x(t_{n-1})), where h is the time step, providing A-stability for stiff systems but potentially introducing numerical ringing in high-Q circuits. An alternative Gear method, introduced in SPICE3, uses backward difference formulas of second or higher order for improved accuracy in oscillatory responses, with the order adaptively selected up to six based on local truncation error estimates controlled by parameters like TRTOL. Time steps are fixed or controlled automatically to balance accuracy and efficiency.[41][43][42] AC analysis evaluates the small-signal frequency response by linearizing the circuit around the DC operating point obtained from prior analysis. Nonlinear devices are replaced by their linearized equivalents, such as transconductances and capacitances, yielding a linear system solved in the frequency domain using complex phasors. For each frequency point, SPICE computes node voltages as \mathbf{V}(\omega) = (\mathbf{G} + j\omega \mathbf{C})^{-1} \mathbf{I}(\omega), where \mathbf{C} is the capacitance matrix and \omega is the angular frequency, allowing extraction of magnitudes, phases, and transfer functions like gain and impedance. This enables efficient characterization of bandwidth, resonance, and stability without simulating full transients.[41][42] Beyond core analyses, SPICE supports specialized evaluations including noise analysis, which computes equivalent input noise spectral densities by summing contributions from devices (e.g., thermal noise $4kT \gamma g_m \Delta f and flicker noise K_f I^\alpha / f^\beta \Delta f) propagated through the small-signal model; sensitivity analysis, which calculates partial derivatives of outputs with respect to parameters using adjoint methods for design optimization; and distortion analysis, assessing harmonic and intermodulation products via small-signal nonlinear coefficients or, in extensions, harmonic balance techniques that solve multi-tone steady-state equations in the frequency domain for large-signal RF circuits.[41][42][44] Numerical instability in nonlinear iterations is mitigated by convergence enhancement techniques, such as source stepping, which gradually ramps independent sources from zero to their final values over multiple DC solutions to provide better initial guesses, and pseudo-transient methods, which introduce artificial time constants to damp oscillations and guide the solver toward the operating point. These are invoked automatically or via options when iterations exceed limits, preventing failures in circuits with floating nodes or sharp nonlinearities.[41][42]Device Models and Parameters
SPICE employs a hierarchy of mathematical models to represent the behavior of electronic components, ranging from simple linear elements to complex nonlinear devices. These models are defined through parameters that capture physical properties such as geometry, material characteristics, and operating conditions, enabling accurate simulation of circuit performance across DC, transient, and AC analyses. The models are specified using dedicated syntax in the input netlist, allowing users to select levels of complexity based on the required fidelity and computational efficiency.[45] Passive components in SPICE are modeled with straightforward equations that account for basic electrical properties and dependencies. Resistors are represented as linear elements with resistance value R, but can include voltage-dependent behavior via a polynomial expression or table lookup for nonlinear cases; temperature dependence is incorporated through coefficients TC1 and TC2 in the equation R(T) = R(T0)[1 + TC1(T - T0) + TC2(T - T0)^2], where T0 is the nominal temperature. Capacitors are defined by capacitance C, with support for initial conditions (IC) to set voltage at simulation start, and junction capacitance modeled as CAP = CJ(L - NARROW)(W - NARROW) + 2 CJSW(L + W - 2 NARROW) for area and sidewall effects in integrated structures. Inductors use inductance L, also with initial current conditions (IC), and can model coupling for transformers via mutual inductance M.[45] Diodes are simulated using the Shockley diode equation, which describes the current-voltage relationship as I = I_S \left( e^{V_D / (n V_T)} - 1 \right), where I_S is the saturation current, n is the emission coefficient, V_D is the diode voltage, and V_T = kT/q is the thermal voltage with Boltzmann constant k, temperature T, and electron charge q. This model includes series resistance RS, junction capacitance with parameters CJO (zero-bias capacitance), VJ (junction potential), and grading coefficient M, as well as temperature dependence through parameters like EG (bandgap energy) and XTI (temperature exponent for saturation current). Breakdown effects are captured by BV (reverse breakdown voltage) and IBV (current at breakdown).[45] Bipolar junction transistors (BJTs) in SPICE utilize the Gummel-Poon model, an integral charge control formulation that extends the Ebers-Moll model to include high-current effects, base-width modulation (Early effect), and charge storage. The model operates at levels 1 through 3, with level 1 providing basic forward and reverse current gains; key parameters include BF (ideal maximum forward current gain β_F, default 100) for low-current beta and IS (transport saturation current, default 1.0 × 10^{-16} A) that scales the exponential collector current. Additional parameters such as VAF (forward Early voltage) account for the Early effect, where output conductance increases with collector-emitter voltage, while TF and TR model forward and reverse transit times for dynamic behavior. The model supports both NPN and PNP types with quasi-saturation effects at high bias levels.[45][46] MOSFET models in SPICE progress from basic to advanced formulations to handle short-channel effects in modern technologies. The level 1 model, based on the Shichman-Hodges equations, assumes long-channel behavior and computes drain current in saturation as I_D = \frac{1}{2} \mu C_{ox} \frac{W}{L} (V_{GS} - V_{TH})^2 (1 + \lambda V_{DS}), where μ is carrier mobility, C_ox is gate oxide capacitance per unit area, W/L is the channel aspect ratio, V_GS is gate-source voltage, V_TH is threshold voltage, and λ is the channel-length modulation parameter. Higher levels (2 and 3) add semi-empirical corrections for mobility degradation and subthreshold conduction. For contemporary nanoscale devices, BSIM models (levels 4 and beyond, up to BSIM4 and BSIM6) provide industry-standard accuracy, incorporating short-channel effects like velocity saturation, DIBL (drain-induced barrier lowering), and pocket implants through parameters such as VTH0 (zero-bias threshold), U0 (low-field mobility), and TOX (oxide thickness); BSIM4, for instance, uses a surface-potential-based core for robust scalability across process variations.[45][47] SPICE supports behavioral modeling through arbitrary dependent sources that use mathematical expressions for voltage or current, such as B sources defined as BXXX N+ N- I=expression (e.g., I = V(1)*V(2)) or V=expression, enabling compact representation of nonlinear or table-based behaviors without detailed internal circuitry. Subcircuits extend this by defining hierarchical macros with .SUBCKT and .ENDS statements, encapsulating complex elements like amplifiers as reusable blocks with instance parameters for customization. These feed into analyses like transient simulations to predict time-domain responses.[45] Device parameters are specified via .MODEL statements, a SPICE-unique syntax that declares a model name, type (e.g., D for diode, NPN for BJT, NMOS for MOSFET), and parameter values, such as .MODEL MOD1 NMOS LEVEL=1 KP=100u VTO=0.7, where LEVEL selects the model complexity, KP is transconductance (μ C_ox), and VTO is zero-bias threshold voltage. This format allows sharing models across multiple instances while supporting temperature scaling and geometric scaling factors like SCALE for area adjustments.[45]Input Formats and Output Visualization
SPICE simulations are primarily defined through text-based netlist files, which describe the circuit topology, components, and simulation directives in a structured, human-readable format. Each line in the netlist typically specifies a component, such as a resistor named R1 connected between nodes 1 and 2 with a value of 1 kΩ, written asR1 1 2 1k. Nodes represent electrical connections, with node 0 conventionally serving as the global ground. The netlist also includes .CONTROL statements to orchestrate simulation runs, such as specifying input files or setting global parameters.[45][48]
Many modern SPICE-compatible tools integrate schematic capture interfaces to simplify circuit definition, automatically generating the underlying netlist from graphical elements. For instance, LTspice provides a built-in schematic editor where users draw components and wires, which the software converts to a SPICE netlist for simulation. Similarly, Qucs offers a graphical user interface for schematic entry, supporting SPICE netlists through its integration with simulators like ngspice, allowing users to visualize and edit circuits before generating the text-based description.[4]
Control statements direct the types of analyses performed, with common examples including .OP for DC operating point analysis, which computes steady-state node voltages and currents, and .TRAN for transient analysis, such as .TRAN 1n 1u to simulate over a time span from 0 to 1 µs with a 1 ns print interval. Output selection is managed via statements like .PROBE in variants such as ngspice, which specifies vectors (e.g., node voltages) to save from the simulation. These directives ensure focused computation and data capture without unnecessary overhead.[45][49]
Simulation results are stored in raw data files, typically with a .raw extension, available in binary or ASCII formats containing time-domain or frequency-domain vectors. Visualization occurs through post-processing tools like Nutmeg, the original interactive plotter bundled with Berkeley SPICE3, which generates waveforms, XY plots, and Bode diagrams from the .raw data. For example, Nutmeg can display voltage versus time traces from a .TRAN run or magnitude-phase plots from .AC analysis.[45][50]
Post-processing extends analysis capabilities, such as applying Fourier transforms to transient outputs via the .FOUR statement to extract harmonic content at a specified fundamental frequency, or generating statistical plots for Monte Carlo simulations by varying parameters like resistor tolerances and plotting distributions of key metrics. In AC analysis, the .raw file directly provides frequency response data for magnitude and phase visualization.[49][45]
Evolutions in open-source variants like ngspice and Xyce include enhanced output options for scripting and integration, such as exporting simulation data in structured formats like CSV or TECPLOT for further processing, though direct JSON or XML exports are facilitated through wrapper tools like PySpice, which convert .raw contents to JSON for Python-based automation. These features support advanced workflows in large-scale simulations.[51][52][21]