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Common base

In electronics, the common base (CB) configuration is one of the three fundamental single-stage bipolar junction transistor (BJT) amplifier topologies, in which the base terminal acts as the shared connection point between the input and output signals, excluding DC power supplies. In this setup, the input signal is applied across the emitter-base junction, while the output is taken from the collector-base junction, with the base typically grounded or held at a fixed potential. This configuration results in a non-inverting amplifier where the input and output waveforms are in phase, and it is particularly noted for its use in high-frequency applications due to good stability and isolation between input and output. The common base amplifier exhibits distinct electrical characteristics, including a low input impedance (typically 10–200 Ω) determined largely by the emitter resistance, and a high output impedance approximately equal to the collector load resistance (R_C). Its current gain, denoted as α (the common-base current gain factor), is less than unity—usually ranging from 0.980 to 0.995—and is related to the transistor's common-emitter current gain β by the formula α = β / (β + 1). In contrast, the voltage gain (A_V) is high, often between 100 and 2000, and can be approximated as A_V = R_C / r'e, where r'e is the small-signal emitter resistance given by r'e = 25 mV / I_E (with I_E as the emitter current in mA). The power gain is comparable to the voltage gain, making it suitable for scenarios requiring voltage amplification without current amplification. Despite its strengths, the common base configuration has limitations, such as its low current gain (less than ), which makes it unsuitable for applications needing significant current , and a voltage gain that can vary unpredictably with conditions. It offers advantages like excellent high-frequency performance—due to reduced capacitance effects—and effective from low to high values, which is beneficial in (RF) amplifiers and cascoded stages. Common applications include current buffers in audio and RF circuits, as well as impedance transformation in multi-stage s where input-output isolation is critical.

Fundamentals

Circuit Configuration

The common base configuration of a (BJT) features the base terminal as the common element, grounded or connected to both the input and output circuits for signals. In this topology, the input signal is applied to the emitter terminal, while the output is taken from the collector terminal. This arrangement is applicable to both NPN and transistors, with the primary difference being the of voltages: for an NPN , the emitter is negative relative to the base, and the collector is positive relative to the base; for a , the emitter is positive relative to the base, and the collector is negative relative to the base. A typical for a common base NPN BJT includes components to establish the . The base is connected to through a , often consisting of two s (R1 and R2) forming a from the positive supply (VCC) to , ensuring the base-emitter junction receives the appropriate . An emitter (RE) is placed in series with the emitter to the negative supply or , providing for stabilization, while a collector (RC) is connected from the collector to VCC. Coupling capacitors are added at the input (between the signal source and emitter) and output (between collector and load) to block while passing signals. For example, the circuit might use a NPN with VCC = 10 V, R1 = 100 kΩ, R2 = 27 kΩ, RE = 1 kΩ, and RC = 2.2 kΩ, setting a quiescent emitter current of approximately 1.5 mA and collector-emitter of 5 V. The PNP version mirrors this but with reversed polarities and a negative supply. The BJT symbol in common base mode uses the standard schematic representation: an NPN transistor is depicted as a circle with an arrow pointing outward from the emitter on the vertical line, while a has the arrow pointing inward; the lead is connected to the common point, the emitter lead receives the input, and the collector lead provides the output. Pinouts follow the transistor's datasheet, such as for the ( package): pin 1 (emitter), pin 2 (), pin 3 (collector), with connections routed accordingly to the and interface the emitter and collector ports. In terms of port definitions, the input port is formed between the emitter and base terminals, where the signal voltage drives current into the emitter; the output port is between the collector and base terminals, from which the amplified current is sourced. This setup contrasts with other BJT configurations like or , which ground different terminals. For proper operation, the common base BJT must be biased in the forward-active region, where the base-emitter junction is forward-biased (V_BE ≈ 0.7 V for devices) to allow carrier injection from the emitter, and the base-collector junction is reverse-biased (V_BC < 0 for NPN) to sweep carriers toward the collector without significant recombination. This biasing ensures the transistor functions as a current-controlled device, with the input current at the emitter nearly equaling the output current at the collector under ideal conditions.

Operating Principles

In the common base configuration of a bipolar junction transistor (BJT), particularly for an NPN type, the principle of current amplification arises from the injection of charge carriers at the emitter, their transport across the base, and collection at the collector. With the base-emitter junction forward-biased and the base-collector junction reverse-biased, electrons are injected from the heavily doped n-type emitter into the p-type base, where they act as minority carriers. These electrons diffuse across the thin, lightly doped base region toward the collector, swept by the electric field in the reverse-biased base-collector depletion region. Due to the narrow base width (typically on the order of 0.1–1 μm) and minimal recombination—facilitated by a long minority carrier lifetime and asymmetric doping that favors electron injection over hole injection—the vast majority of injected electrons reach the collector without recombining with holes in the base. This results in the common-base current gain, denoted α (alpha), defined as the ratio of collector current to emitter current (α = I_C / I_E), approaching unity (typically 0.98–0.999), indicating near-complete transfer of emitter current to the collector. The input signal voltage, applied between the emitter and the grounded , modulates the base-emitter forward bias voltage (V_BE), exponentially controlling the rate of electron injection and thus the emitter (I_E) according to the Ebers-Moll model, where I_E ≈ I_S (exp(V_BE / V_T) - 1) and I_S is the . For operation in the active region, the transistor requires V_BE ≈ 0.6–0.7 V (for silicon) to forward-bias the base-emitter junction and V_BC < 0 (or V_CE > V_BE) to maintain reverse bias at the base-collector junction, ensuring carrier injection without or . The DC collector is then given by I_C = α I_E, while the small base supplies the recombination needs and is expressed as I_B = (1 - α) I_E, highlighting that only a small of emitter is lost in the base. Qualitatively, the in the common base setup is low because the signal is applied directly to the emitter, where the dynamic is dominated by the small intrinsic emitter r_e ≈ V_T / I_E (typically 10–100 Ω), akin to emitter degeneration that stabilizes but requires a low-impedance source to drive effectively. Conversely, the is high, as the collector remains relatively independent of the collector-emitter voltage (V_CE) in the , behaving nearly like a with on the order of tens to hundreds of kΩ. However, the introduces a finite in the I_C-V_CE output characteristics, arising from base-width modulation: as V_CE increases, the base-collector widens into the base, effectively narrowing the neutral base and increasing the minority carrier concentration gradient, which boosts I_C slightly (modeled as I_C ≈ I_S exp(V_BE / V_T) (1 + V_CE / V_A), where V_A is the Early voltage, 15–150 V). This modulation causes a small positive output conductance but does not significantly degrade the high-impedance behavior for most applications.

Small-Signal Characteristics

Input and Output Parameters

In the common base configuration, the small-signal input impedance r_{in} is low and approximated as the dynamic emitter resistance r_e = \frac{V_T}{I_E}, where V_T is the thermal voltage (about 26 mV at ) and I_E is the quiescent emitter current; this results in typical values of 10 to 100 ohms, making it suitable for driving from low-impedance sources. The low impedance stems from the emitter terminal acting as the input port with the base AC-grounded, effectively presenting the intrinsic emitter resistance to the signal. The small-signal output impedance r_{out} is high, approximately equal to the transistor's output resistance r_o = \frac{V_A}{I_C}, where V_A is the Early voltage (typically 50 to 100 V) and I_C is the quiescent collector current; this yields values from hundreds of kilohms to several megohms, reflecting the collector's behavior as a high-impedance current source. This characteristic arises because variations in collector voltage have minimal impact on collector current due to the Early effect, enhanced by the fixed base potential. The reverse voltage gain parameter h_{rc} \approx \frac{1}{1 + g_m r_o} is small (often less than 0.01), where g_m = \frac{I_C}{V_T} is the , owing to the high in the path at low frequencies. The forward current transfer ratio h_{fb} = -\alpha \approx -[1](/page/1), with \alpha being the common-base current nearly equal to , indicates that the collector current closely mirrors the negative of the emitter current. This \alpha relates to the common-emitter current \beta by \alpha = \frac{\beta}{1 + \beta}, typically yielding \alpha > 0.98 for \beta in the range of 50 to 200. For context, the following table compares the approximate input and output impedances across BJT configurations, highlighting the common base's unique low-input, high-output profile:
ConfigurationInput ImpedanceOutput Impedance
Common BaseLow (\approx r_e \approx 10{-}100 \, \Omega)High (\approx r_o \approx 100 \, \mathrm{k}\Omega{-}1 \, \mathrm{M}\Omega)
Medium (\approx \beta r_e \approx 1{-}10 \, \mathrm{k}\Omega)Medium (\approx r_o \parallel R_C \approx 10{-}100 \, \mathrm{k}\Omega)
High (\approx \beta (r_e + R_E) > 100 \, \mathrm{k}\Omega)Low (\approx \frac{r_e}{\beta + 1} \approx 10{-}100 \, \Omega)

Gain Expressions

The small-signal analysis of the common base (CB) amplifier employs the hybrid-π model of the (BJT), where the g_m = I_C / V_T (with V_T as the thermal voltage, approximately 25 mV at ) governs the relationship between base-emitter voltage and collector current. In the CB configuration, the base is grounded, the input signal is applied to the emitter, and the output is taken from . The base-emitter resistance r_\pi is typically neglected due to the low at the emitter, simplifying the model to the T-equivalent where the input resistance approximates r_e = 1 / g_m. The A_i of the CB amplifier is given by A_i \approx \alpha, where \alpha = I_C / I_E is the common-base factor of the BJT, typically very close to (e.g., 0.98–0.99 for most devices in active mode) and non-inverting. This near- value arises because the collector closely mirrors the emitter , with only a small base component. The derivation follows from the small-signal T-model, where the emitter input i_e produces an output collector i_c = \alpha i_e, yielding A_i = i_c / i_e \approx 1. The voltage gain A_v is high and positive, expressed as A_v = \alpha R_C / r_e \approx g_m R_C, where R_C is the collector . This formula derives from the : the input voltage v_{in} across r_e produces a base-emitter voltage variation that drives the controlled g_m v_\pi (with v_\pi \approx v_{in}), resulting in an output voltage v_{out} = g_m v_{in} R_C. The high stems from the low input (\approx r_e) and high output , enabling efficient voltage without phase inversion. When a load R_L is present, the effective gain becomes A_v = g_m (R_L \parallel r_o), where r_o is the transistor's output . The power gain A_p is the product of the voltage and current gains, A_p = A_v A_i \approx g_m R_C (since A_i \approx 1), highlighting the CB amplifier's efficiency in power transfer for stages requiring high voltage swing with minimal current amplification. This makes it suitable for in multi-stage designs. Limitations on these gain expressions include the , which manifests as finite r_o = V_A / I_C (with V_A as the Early voltage, typically 50–150 V), reducing the effective load resistance and thus lowering A_v from its ideal value. Qualitatively, load capacitance can further diminish gain by shunting the output at higher signal frequencies, though this is secondary in DC small-signal analysis.

Frequency Response

Low-Frequency Behavior

The low-frequency behavior of the common base is governed by the capacitors in the input and output paths, as well as elements in the bias network, which create effects that define the lower of the . These components cause the to at low frequencies, with the typically dominated by the time constants associated with the capacitors and the effective resistances they see. The low-frequency f_L is the highest frequency among the individual s, typically dominated by the input due to low . Approximate input pole: f_{L,in} \approx \frac{1}{2\pi (R_S + 1/g_m) C_E} \approx \frac{1}{2\pi R_S C_E}; output pole: f_{L,out} \approx \frac{1}{2\pi (R_C + R_L) C_C}. In the common base configuration, the input coupling capacitor C_E at the emitter interacts with the low input impedance (approximately $1/g_m) and R_S, forming a dominant time constant \tau = (R_S + 1/g_m) C_E \approx R_S C_E that shifts the low-end response. The output coupling capacitor similarly contributes a time constant involving the collector resistance and R_L, but the input pole often sets the overall f_L due to the configuration's inherently low emitter impedance. The overall cutoff is the frequency at which the gain drops by 3 dB from its midband value, ensuring minimal attenuation above this point. Within the midband region—frequencies well above f_L—the and any capacitors behave as short circuits (for signals) or open circuits (for ), yielding flat characteristics that align with the DC-biased assumptions. This ideal operation assumes negligible capacitor impedances, allowing the to achieve its nominal current or voltage without low-frequency attenuation. An unbypassed emitter resistance introduces degeneration, providing that improves bias stability by reducing sensitivity to variations in parameters like g_m or \beta, though it marginally lowers the midband by increasing the effective . The Bode magnitude plot for the common base amplifier exhibits a single-pole of -20 per below f_L, reflecting the high-pass nature of the networks, with the input \tau = R_S C_E primarily responsible for this behavior. capacitors serve a critical DC blocking function, isolating the amplifier's from and load to prevent currents or voltage shifts, while the —typically a or at the —ensures a stable quiescent unaffected by signals. This separation maintains overall circuit stability without compromising low-frequency performance once above f_L.

High-Frequency Limitations

The high-frequency performance of the (CB) configuration is primarily limited by the transistor's intrinsic capacitances, such as the base-emitter capacitance C_\pi and collector-base capacitance C_\mu, which introduce poles that reduce gain at elevated frequencies. Unlike the (CE) amplifier, the CB topology exhibits superior due to the absence of a significant on C_\mu, as the base is ed and thus one terminal of C_\mu is at AC , preventing of this capacitance at the input. This results in an effective input capacitance close to C_\pi without the multiplicative factor (1 + g_m R_L) seen in CE circuits, allowing CB amplifiers to achieve higher frequencies suitable for radio-frequency (RF) applications. The upper cutoff frequency f_H of a CB amplifier is approximated by f_H \approx f_T / (1 + g_m R_S), where f_T is the transistor's transition frequency, g_m is the , and R_S is the signal source resistance at the emitter input. This expression highlights the intrinsic limit set by f_T = g_m / [2\pi (C_\pi + C_\mu)], the frequency at which the short-circuit current gain extrapolates to unity, with bandwidth degradation occurring if g_m R_S becomes large due to loading effects. Additionally, base widening (Kirk effect) at high currents and frequencies contributes to current gain roll-off, modeled by the common-base current gain \alpha(f) = \alpha_0 / (1 + j f / f_\alpha), where \alpha_0 is the low-frequency alpha (typically 0.98–0.99) and the alpha cutoff f_\alpha = f_T (1 - \alpha_0)/\alpha_0 \approx f_T / \beta_0 for large \beta_0. This fall-off arises from delayed charge transport across the base region, limiting \alpha to \alpha_0 / \sqrt{2} at f_\alpha. The gain-bandwidth product (GBW) for a BJT in CB configuration remains approximately equal to f_T, providing a constant trade-off where higher voltage gain (via load resistance) reduces , but the overall product is preserved up to the device's physical limits. This characteristic, along with low input and high between input and output ports, makes CB amplifiers advantageous for RF amplification stages, such as in low-noise amplifiers or networks, where maintaining wide is critical. Quantitative examples from BJTs show f_T values ranging from 100 MHz to several GHz, enabling CB bandwidths exceeding those of CE by factors of 10 or more in unloaded conditions.

Applications

Voltage Amplification

The (CB) configuration serves as a high voltage gain stage in multi-stage amplifiers, providing significant amplification with excellent between input and output ports. This isolation minimizes effects, enhancing overall circuit stability and performance in cascaded designs. Notably, the CB stage is frequently employed in amplifiers, where it is stacked atop a (CE) stage to increase bandwidth by reducing the on the input transistor's . A typical example is the amplifier with a resistive load R_L connected to , where the small-signal voltage gain is approximately A_v \approx g_m R_L, with g_m being the of the . This setup is particularly suitable for low-noise preamplifiers, as the can achieve low input-referred noise when paired with low-impedance sources, such as in optical receivers or interfaces. In modern integrated circuits, including internal stages, the configuration appears in arrangements to deliver high gain while maintaining wide bandwidth, as seen in high-performance analog designs. Key advantages of the CB stage for voltage amplification include its stable , which remains relatively insensitive to variations in parameters due to the grounded base reducing internal , and low input signal arising from the low input (r_{in} \approx 1/g_m), which loads the source minimally and preserves . However, drawbacks include the necessity for a low source impedance to drive the low r_{in} effectively without excessive , and increased power consumption due to the currents required for the emitter input to maintain proper operation. The high voltage aligns with expressions derived in small-signal , emphasizing the CB's role as a transconductance-to-voltage converter.

Current Buffering

In the common base configuration, the transistor functions as a unity-gain current follower, where the input emitter current I_E is approximately equal to the collector current I_C divided by the common-base current gain \alpha, yielding I_E \approx I_C / \alpha \approx I_C since \alpha is typically 0.98 to 0.99 for silicon BJTs. This relationship allows the output current to mirror the input current with nearly unity gain A_i \approx 1. The low input impedance at the emitter (typically tens to hundreds of ohms) enables effective current sourcing or sinking from low-impedance sources, while the high output impedance at the collector (often in the megohm range) makes it suitable as an ideal current source follower in signal chains. This buffering capability finds application in current mirrors, particularly in cascode topologies where the common base transistor stacks atop a reference to enhance and improve current matching accuracy across varying voltages. In sensor interfaces, such as photodiode transimpedance amplifiers, the common base stage buffers the by presenting a at the input, minimizing voltage swings across the photodiode's junction (often 1-10 ) and reducing while preserving high in optimized designs. For instance, in optical receivers, this configuration isolates the 's from the feedback network, achieving suitable transimpedance gains with low input-referred . A practical example is the use of a in feedback loops for , such as monitoring load currents in power supplies or motor drives, where the emitter senses the shunt current and the collector delivers a mirrored output to an or , maintaining A_i \approx 1 for precise replication without significant attenuation. This setup benefits from the configuration's high , which ensures the buffered current remains stable against load variations, making it ideal for applications requiring faithful current transfer in low-capacitance environments.

Enhancements

Active Loading

In the common-base configuration of a bipolar junction transistor (BJT) amplifier, active loading involves replacing the traditional passive collector resistor R_C with a transistor-based circuit, such as a current mirror, to achieve a significantly higher effective output resistance r_{out}. This technique leverages the high output impedance of the active device, typically on the order of the transistor's Early voltage divided by the collector current (r_o = V_A / I_C), far exceeding that of a passive resistor limited by power supply constraints and dissipation. A basic active load can be implemented using a simple formed by two matched transistors, where the input branch sets the reference current and the output branch mirrors it to the collector of the common-base NPN . For improved performance, the —consisting of three s with the third operating in a common-base mode to provide —serves as the load, boosting the output resistance to approximately \beta r_o, where \beta is the current gain. This configuration ensures better current matching and minimizes errors due to base current loading, resulting in a voltage gain A_v \approx g_m (\beta r_o), where g_m is the of the input . The primary benefits of active loading include substantially higher voltage gain compared to passive loads, as the effective r_{out} can reach tens or hundreds of kΩ without excessive consumption in the load. Additionally, it enhances by avoiding the quadratic voltage drop across a and reduces headroom loss, allowing larger output signal swings closer to the supply rails, provided the load is biased appropriately. For instance, in integrated circuits, this approach enables improvements in multi-stage amplifiers. However, active loads introduce trade-offs, such as increased due to the additional transistors required for and . They also demand precise matching of BJT parameters (e.g., \beta and V_{BE}) to maintain accuracy, which can be challenging in discrete implementations and sensitive to temperature variations. Potential instability arises from the in improved mirrors like the type, necessitating careful to avoid oscillations, particularly in high-frequency applications.

Stability Analysis

The common base amplifier configuration demonstrates unconditional across a wide range of operating conditions, as quantified by the Rollett stability factor K > 1, which ensures no oscillations occur regardless of passive and load impedances. This inherent stability arises primarily from the low reverse voltage parameter h_{rb}, typically on the order of $10^{-4} to $10^{-3}, in the hybrid-parameter model, minimizing internal coupling between output and input ports. Feedback paths in the common base amplifier are predominantly internal via h_{rb}, which is negligible compared to other configurations, but external paths can emerge through capacitive or from the load or source. These external feedbacks, if unaddressed, may degrade margins, particularly in multi-stage designs where inter-stage interactions amplify phase shifts. risks escalate at high frequencies, especially with inductive loads that interact with parasitic capacitances to form resonant circuits providing ; such risks are commonly mitigated by neutralization, employing a compensating sized as C_N \approx C_{bc} \cdot (Z_L / Z_{in}) to the base-collector and restore unilateral . To rigorously assess stability, the is applied by plotting the open-loop G(j\omega)H(j\omega) in the ; the system remains stable if the plot does not encircle the critical point (-1, 0), providing insight into and margins for the common base circuit. Compensation techniques, such as adding series inductors or shunt capacitors in paths, further enhance stability by adjusting the loop 's to avoid encirclement. In practice, incorporating an unbypassed emitter degeneration resistor R_E introduces local , desensitizing the to transistor parameter variations (e.g., \beta) and increasing the stability factor by linearizing the , often at the expense of reduced . For instance, R_E \approx 50-100 \, \Omega can yield a 20-30% improvement in without significantly impacting low-frequency performance.

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