Multi-chip module
A multi-chip module (MCM) is an advanced semiconductor packaging technology that integrates multiple integrated circuits (ICs), bare dies, or discrete components into a single compact package, enabling higher functionality, improved electrical performance, and space efficiency compared to traditional single-chip designs.[1][2] This approach typically involves mounting the chips on a common substrate—such as ceramic, laminate, or silicon—and interconnecting them via methods like wire bonding, flip-chip bumping, or through-silicon vias (TSVs), resulting in a two-dimensional or three-dimensional assembly that functions as a unified system.[3][4] The concept of MCMs dates back to the 1970s with early uses in IBM mainframes, gaining prominence in the 1980s and early 1990s, particularly among high-reliability sectors like the military and aerospace, where cost pressures and the need for off-the-shelf components drove adoption over custom monolithic ICs.[1][5] Early implementations relied on wire bonding for interconnections, marking MCMs as a foundational form of system-in-package (SiP) technology that paved the way for more sophisticated heterogeneous integration.[2] By the mid-1990s, standards from organizations like the IPC classified MCM variants, reflecting their evolution from hybrid microcircuits to denser, performance-oriented packages used in applications such as high-speed digital systems and telecommunications.[2] MCMs are categorized into several types based on substrate materials and fabrication processes, each suited to specific performance and cost requirements. MCM-D (deposited) uses thin-film deposition on silicon or ceramic substrates for fine-line interconnects (as narrow as 25 μm) and high-density routing, ideal for high-speed applications.[2] MCM-C (ceramic) employs thick-film printing on cofired ceramics for robust, multilayer structures (up to 20 layers) with good thermal properties, commonly in military and industrial uses.[2] MCM-L (laminate) leverages organic laminates similar to printed circuit boards but with finer features, offering a cost-effective option for consumer electronics.[2] Advanced variants, such as 3D-MCMs, stack chips vertically using TSVs for even greater density.[2] These types support interconnection techniques like tape-automated bonding (TAB) or flip-chip assembly to minimize signal delays and power consumption.[3] Key advantages of MCMs include enhanced system performance through shorter interconnects, which reduce latency and power usage, alongside superior reliability and miniaturization for space-constrained devices like smartphones and sensors.[2][4] They enable heterogeneous integration by combining chips from different process nodes or vendors, improving yield and lowering costs for complex systems compared to large monolithic dies.[6] Applications span consumer electronics (e.g., multi-function SiPs in mobile devices), automotive signal processing, and high-performance computing (HPC), where MCMs facilitate chiplet-based designs.[2][4] However, challenges such as higher manufacturing costs due to serial processing, thermal management in stacked configurations, and mechanical stresses from material mismatches persist.[2][4] In recent years, MCM technology has advanced through the rise of chiplet architectures and 2.5D/3D integration, driven by initiatives like the DARPA CHIPS program to address scaling limits in advanced nodes (e.g., 3 nm). In November 2025, DARPA announced a $1.4 billion investment in a Texas foundry dedicated to 3D heterogeneous integration and advanced packaging techniques.[7][4] Innovations include fan-out wafer-level packaging (FOWLP) for higher I/O densities and low-CTE materials to mitigate warpage in large modules, supporting emerging demands in AI, 5G, and IoT.[6][8] These developments position MCMs as a cornerstone of heterogeneous integration, with projections indicating continued growth in adoption for modular, high-bandwidth systems through 2030.[9]Introduction
Definition and Principles
A multi-chip module (MCM) is an electronic assembly that integrates multiple integrated circuits (ICs), bare dies, or discrete components into a single package to achieve enhanced system functionality, performance, and compactness.[4][10] The core components of an MCM include the individual chips or dies, which provide the primary computational or functional elements; a substrate that serves as the mounting and interconnection platform; encapsulation materials that protect the assembly from environmental factors; and external interfaces such as pins, balls, or pads for connection to a printed circuit board (PCB).[4][11] These elements work together to form a modular unit that can be treated as a single component in larger systems.[10] The operational principles of MCMs center on improving signal integrity through short, high-density interconnects that minimize latency and electromagnetic interference between chips.[4][11] Thermal management is facilitated by the shared substrate, which aids in heat dissipation across multiple dies, often requiring advanced cooling solutions to handle localized hotspots.[10] Additionally, MCMs emphasize modularity, enabling the combination of heterogeneous chips—such as logic processors with memory or RF components—to optimize performance without relying on a single monolithic die.[4][11] Compared to single-chip modules, MCMs achieve higher integration density by combining multiple smaller dies, which allows for greater overall functionality within a reduced footprint.[4] They also improve manufacturing yield by incorporating known-good dies that have been individually tested prior to assembly, avoiding the risks associated with fabricating large, complex single chips.[10][11] Key metrics for MCMs include die sizes typically ranging from 100 to 700 mm², I/O counts exceeding 1,000 per module, power dissipation up to 200 W, and form factor reductions of over 50% relative to discrete packaging equivalents.[4][11]Historical Development
The origins of multi-chip modules (MCMs) trace back to the late 1950s and 1960s, when the U.S. Army Signal Corps, in collaboration with RCA as the prime contractor, developed hybrid microcircuits as compact assemblies of transistor chips and passive components mounted on ceramic substrates and interconnected via wires or traces.[12] These early designs served primarily military applications, enabling dense packaging for reliable performance in harsh environments, such as radar and communication systems.[12] By 1964, IBM's Solid Logic Technology (SLT) advanced this concept further with 0.5-inch square ceramic modules featuring vertical pins, which offered improved speed, lower power consumption, and higher reliability compared to traditional printed-circuit boards, marking a shift toward modular integration in computing hardware.[12] In the 1970s, IBM introduced the first commercial MCMs through its bubble memory systems, which integrated multiple semiconductor dies on a single module to achieve high-density non-volatile storage with performance rivaling core memory and densities approaching hard drives.[13] This innovation demonstrated MCMs' potential for compact, efficient data handling, paving the way for broader adoption in computing applications.[14] The 1980s saw significant advancements in MCM technology for high-performance systems, exemplified by IBM's Thermal Conduction Module (TCM) in the 3081 mainframe, introduced around 1981, which utilized multilayer ceramic substrates to house up to 118 chips in a helium-filled, water-cooled package for enhanced thermal management and signal integrity.[15] This design supported the dense integration needed for mainframe computing, achieving superior speed and reliability.[16] Concurrently, MCMs gained traction in aerospace and radar applications, where organizations like the Johns Hopkins Applied Physics Laboratory evolved hybrid circuits into complex MCMs with over 300 interconnections and dozens of chips on laminate, co-fired ceramic, or deposited film substrates to meet demands for miniaturization and high-density signal processing.[17] During the 1990s, research into superconducting MCMs emerged for high-performance computing, leveraging high-temperature superconductors like YBCO (critical temperature 90K) and TBCCO (125K) to integrate multiple chips with reduced power loss and speeds over 2.5 times faster than semiconductors, as explored in studies comparing materials for Josephson junction-based circuits.[18] These efforts highlighted MCMs' role in enabling ultra-low-power, high-speed systems, though practical adoption remained limited by cooling requirements.[18] Industry standardization advanced with the widespread classification of MCM types—MCM-L (laminate-based), MCM-C (ceramic), and MCM-D (deposited)—which became conventional by the mid-1990s to guide substrate and interconnection choices for diverse applications.[19] The 2000s and 2010s marked a transition toward chiplets and system-in-package (SiP) approaches, driven by the rise of mobile computing's need for compact, heterogeneous integration; SiP, an evolution of MCMs, bundled multiple ICs and passives into single packages to address size and power constraints in smartphones and portables.[20] AMD's 2011 Bulldozer architecture exemplified early multi-die adoption in CPUs, with server variants like the 16-core Opteron Interlagos using a multi-chip module packaging two 8-core dies for scalable performance without single-die limitations.[21] In the 2020s, MCMs have integrated with 5G and AI technologies, enhancing connectivity and computational efficiency; for instance, NXP's 2021 GaN-based MCMs for 5G infrastructure improved power amplifier efficiency by 8 percentage points to 52% at 2.6 GHz, reducing radio size and weight while supporting high-bandwidth demands in edge AI processing.[22] In AI applications, AMD's Instinct MI300X accelerator, launched in 2023, utilizes a multi-chiplet MCM architecture integrating multiple compute dies with 192 GB of HBM3 memory to deliver high performance for generative AI and high-performance computing workloads.[23]Classifications
Substrate-Based Types
Substrate-based types of multi-chip modules (MCMs) are classified according to the material and fabrication method of the interconnecting substrate, which serves as the foundation for mounting and interconnecting multiple chips. These types—MCM-C, MCM-L, MCM-D, and MCM-S—differ in wiring density, thermal management, cost, and suitability for specific performance requirements, influencing their selection for various applications.[2] MCM-C modules employ co-fired ceramic multilayers, often using low-temperature co-fired ceramic (LTCC) or high-temperature co-fired ceramic (HTCC) substrates with thick-film metallization. These substrates typically feature 2 to 20 layers, with line widths and spacings of 5 to 20 mils (127 to 508 μm), enabling wiring densities around 80 cm/cm². Their high thermal conductivity, often exceeding 20 W/m·K for LTCC, makes them ideal for dissipating heat in high-power environments. MCM-C is particularly suited for radio frequency (RF) and microwave applications due to low dielectric loss and stable performance up to several GHz. For instance, LTCC-based MCM-C modules are used in military radar systems, such as the AN/SPS-48 air defense radar for the US Navy, where they integrate GaAs chips into compact, multifunction tiles supporting high-output power amplifiers. However, fabrication involves sintering, which can cause substrate shrinkage and increase costs to approximately $3 per square inch per conductive layer.[2][24][25] MCM-L modules utilize organic laminated substrates, such as FR-4 epoxy or polyimide reinforced with fiberglass, Kevlar, or aramid, processed via standard printed circuit board techniques with enhanced photolithography for finer features. These offer moderate wiring densities of about 300 cm/cm², with line widths of 60 to 100 μm and via sizes around 200 to 300 μm. Their low cost, roughly $1 per square inch per conductive layer, stems from established manufacturing infrastructure, making them prevalent in consumer electronics for interconnecting chips in devices like smartphones and computing peripherals. Polyimide variants provide better thermal stability (up to 260°C) compared to FR-4, but both suffer from higher dielectric constants (around 3.5 to 4.5) and loss tangents (0.02 for FR-4), leading to signal attenuation in high-frequency operations above 1 GHz. This limits their use in demanding RF scenarios, though blind and buried vias can modestly improve density at added expense.[24][26][27] MCM-D modules rely on thin-film deposition processes to build multilayer interconnects using dielectrics like polyimide or benzocyclobutene (BCB) on carriers such as silicon, glass, or ceramic, achieving the highest wiring densities over 500 lines per inch. Line widths as fine as 15 to 25 μm and via diameters of 18 to 26 μm support up to 8 layers with low dielectric constants below 5, enabling signal speeds in the tens of GHz with minimal loss. This makes MCM-D ideal for high-speed computing and VLSI systems requiring dense, low-latency interconnections. However, the complex sequential deposition and etching steps drive high costs, estimated at $15 per square inch per conductive layer, and pose testing challenges due to the substrate's delicacy.[24][2][28] MCM-S modules use silicon as the interposer substrate, often fabricated with through-silicon vias (TSVs) for vertical interconnects, providing excellent coefficient of thermal expansion (CTE) matching to silicon dies (around 3 ppm/°C) to minimize stress in heterogeneous integration. This enables fine-pitch interconnections below 10 μm and high-density routing for bandwidths exceeding 1 Tbps in 2.5D packaging configurations. Silicon's low dielectric loss supports ultra-high-frequency signals up to 100 GHz, making MCM-S suitable for advanced computing, high-bandwidth memory, and 5G telecommunications. Trade-offs include higher fabrication complexity from wafer-level processing and vulnerability to damage during handling, though it offers superior electrical performance over organic alternatives.[29][30]| Type | Wiring Density (approx. cm/cm²) | Cost (per in²/layer, early 1990s) | Thermal Conductivity | Frequency Support |
|---|---|---|---|---|
| MCM-C | 80 | $3 | High (>20 W/m·K) | Up to several GHz |
| MCM-L | 300 | $1 | Moderate (0.2-1 W/m·K) | Up to 1 GHz |
| MCM-D | >2000 | $15 | Low (0.2-0.3 W/m·K) | Tens of GHz |
| MCM-S | >5000 (fine pitch <10 μm) | High (wafer-scale) | High (150 W/m·K for Si) | Up to 100 GHz |